From: Bjorn Helgaas <bhelgaas@google.com>
Date: Thu, 27 Mar 2025 18:14:46 +0000 (-0500)
Subject: Merge branch 'pci/endpoint-test'
X-Git-Tag: block-6.15-20250403~40^2~18
X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=cc28c0e5e725165d19deccfd5cd6025384c9dbb1;p=linux-block.git

Merge branch 'pci/endpoint-test'

- Fix endpoint BAR testing so the test can skip disabled BARs instead of
  reporting them as failures (Niklas Cassel)

- Verify that pci_endpoint interrupt tests set the correct IRQ type
  (Kunihiko Hayashi)

- Fix interpretation of pci_endpoint_test_bars_read_bar() error returns
  (Niklas Cassel)

- Fix potential string truncation in pci_endpoint_test_probe() (Niklas
  Cassel)

- Increase endpoint test BAR size variable to accommodate BARs larger than
  INT_MAX (Niklas Cassel)

- Release IRQs to avoid leak in pci_endpoint interrupt tests (Kunihiko
  Hayashi)

- Log the correct IRQ type when pci_endpoint IRQ request test fails
  (Kunihiko Hayashi)

- Remove pci_endpoint_test irq_type and no_msi globals; instead use
  test->irq_type (Kunihiko Hayashi)

- Remove unnecessary use of managed IRQ functions in pci_endpoint_test
  (Kunihiko Hayashi)

- Add and use IRQ_TYPE_* defines in pci_endpoint_test (Niklas Cassel)

- Add struct pci_epc_features.intx_capable and note that RK3568 and RK3588
  can't raise INTx interrupts (Niklas Cassel)

- Expose supported IRQ types in CAPS so pci_endpoint_test can set
  appropriate type (Niklas Cassel)

- Add PCITEST_IRQ_TYPE_AUTO to pci_endpoint_test for cases where the IRQ
  type doesn't matter (Niklas Cassel)

* pci/endpoint-test:
  misc: pci_endpoint_test: Add support for PCITEST_IRQ_TYPE_AUTO
  PCI: endpoint: pci-epf-test: Expose supported IRQ types in CAPS register
  PCI: dw-rockchip: Endpoint mode cannot raise INTx interrupts
  PCI: endpoint: Add intx_capable to epc_features struct
  selftests: pci_endpoint: Use IRQ_TYPE_* defines from UAPI header
  misc: pci_endpoint_test: Use IRQ_TYPE_* defines from UAPI header
  PCI: endpoint: pcitest: Add IRQ_TYPE_* defines to UAPI header
  misc: pci_endpoint_test: Do not use managed IRQ functions
  misc: pci_endpoint_test: Remove global 'irq_type' and 'no_msi'
  misc: pci_endpoint_test: Fix 'irq_type' to convey the correct type
  misc: pci_endpoint_test: Fix displaying 'irq_type' after 'request_irq' error
  misc: pci_endpoint_test: Avoid issue of interrupts remaining after request_irq error
  misc: pci_endpoint_test: Handle BAR sizes larger than INT_MAX
  misc: pci_endpoint_test: Give disabled BARs a distinct error code
  misc: pci_endpoint_test: Fix potential truncation in pci_endpoint_test_probe()
  misc: pci_endpoint_test: Fix pci_endpoint_test_bars_read_bar() error handling
  selftests: pci_endpoint: Add GET_IRQTYPE checks to each interrupt test
  selftests: pci_endpoint: Skip disabled BARs
---

cc28c0e5e725165d19deccfd5cd6025384c9dbb1
diff --cc drivers/pci/controller/dwc/pcie-dw-rockchip.c
index df2eaa35d045,4aa25bcf9106..3f664d75e33b
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@@ -272,13 -272,14 +272,14 @@@ static const struct pci_epc_features ro
  	.linkup_notifier = true,
  	.msi_capable = true,
  	.msix_capable = true,
+ 	.intx_capable = false,
  	.align = SZ_64K,
 -	.bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_1] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_2] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_3] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_5] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 +	.bar[BAR_0] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_1] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_2] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_3] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_4] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_5] = { .type = BAR_RESIZABLE, },
  };
  
  /*
@@@ -292,13 -293,14 +293,14 @@@ static const struct pci_epc_features ro
  	.linkup_notifier = true,
  	.msi_capable = true,
  	.msix_capable = true,
+ 	.intx_capable = false,
  	.align = SZ_64K,
 -	.bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_1] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_2] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 -	.bar[BAR_3] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 +	.bar[BAR_0] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_1] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_2] = { .type = BAR_RESIZABLE, },
 +	.bar[BAR_3] = { .type = BAR_RESIZABLE, },
  	.bar[BAR_4] = { .type = BAR_RESERVED, },
 -	.bar[BAR_5] = { .type = BAR_FIXED, .fixed_size = SZ_1M, },
 +	.bar[BAR_5] = { .type = BAR_RESIZABLE, },
  };
  
  static const struct pci_epc_features *