From: Stephen Boyd <sboyd@kernel.org>
Date: Tue, 9 Jan 2024 19:55:06 +0000 (-0800)
Subject: Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next
X-Git-Tag: v6.8-rc1~106^2~1
X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=a4dcb2f84be44da9e7ae0e420adcab1f6efb8de6;p=linux-block.git

Merge branches 'clk-zynq', 'clk-xilinx' and 'clk-stm' into clk-next

 - Update Zynqmp driver for Versal NET platforms
 - Add clk driver for Versal clocking wizard IP

* clk-zynq:
  drivers: clk: zynqmp: update divider round rate logic
  drivers: clk: zynqmp: calculate closest mux rate

* clk-xilinx:
  clocking-wizard: Add support for versal clocking wizard
  dt-bindings: clock: xilinx: add versal compatible

* clk-stm:
  dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform
  clk: stm32mp1: use stm32mp13 reset driver
  clk: stm32mp1: move stm32mp1 clock driver into stm32 directory
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a4dcb2f84be44da9e7ae0e420adcab1f6efb8de6