From: Andy Yan Date: Sat, 26 Apr 2025 07:15:40 +0000 (+0800) Subject: arm64: dts: rockchip: Add eDP1 dt node for rk3588 X-Git-Tag: v6.16-rc1~97^2~40^2~24 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=a481bb0b1ad936c976679f9de25a709b98f9dcc3;p=linux-block.git arm64: dts: rockchip: Add eDP1 dt node for rk3588 Add eDP1 dt node for RK3588 SoC Signed-off-by: Andy Yan Link: https://lore.kernel.org/r/20250426071554.1305042-1-andyshrk@163.com Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi index 099edb3fd0f6..9d81d3b9444e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi @@ -252,6 +252,34 @@ }; }; + edp1: edp@fded0000 { + compatible = "rockchip,rk3588-edp"; + reg = <0x0 0xfded0000 0x0 0x1000>; + clocks = <&cru CLK_EDP1_24M>, <&cru PCLK_EDP1>, <&cru CLK_EDP1_200M>; + clock-names = "dp", "pclk", "spdif"; + interrupts = ; + phys = <&hdptxphy1>; + phy-names = "dp"; + power-domains = <&power RK3588_PD_VO1>; + resets = <&cru SRST_EDP1_24M>, <&cru SRST_P_EDP1>; + reset-names = "dp", "apb"; + rockchip,grf = <&vo1_grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + edp1_in: port@0 { + reg = <0>; + }; + + edp1_out: port@1 { + reg = <1>; + }; + }; + }; + hdmi_receiver: hdmi_receiver@fdee0000 { compatible = "rockchip,rk3588-hdmirx-ctrler", "snps,dw-hdmi-rx"; reg = <0x0 0xfdee0000 0x0 0x6000>;