From: Lucas Stach Date: Wed, 19 Jun 2024 18:21:57 +0000 (+0200) Subject: drm/bridge: analogix_dp: don't wait for PLL lock too early X-Git-Tag: io_uring-6.11-20240722~49^2~15^2~3 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=917c8d192ba6ada16b4cf11c786f3dbfe70de0d9;p=linux-2.6-block.git drm/bridge: analogix_dp: don't wait for PLL lock too early The PLL will be reconfigured later, which may cause it to go out of lock anyway, so there is no point in waiting for the PLL to lock here. Instead we can continue execution of the link setup, which will properly set the PLL parameters and will wait for the PLL to lock at the appropriate times. Signed-off-by: Lucas Stach Reviewed-by: Robert Foss Tested-by: Heiko Stuebner Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/20240619182200.3752465-11-l.stach@pengutronix.de --- diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index d267cf05cbca..e9c643a8b6fc 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -356,7 +356,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, int analogix_dp_init_analog_func(struct analogix_dp_device *dp) { u32 reg; - int timeout_loop = 0; analogix_dp_set_analog_power_down(dp, POWER_ALL, 0); @@ -368,18 +367,7 @@ int analogix_dp_init_analog_func(struct analogix_dp_device *dp) writel(reg, dp->reg_base + ANALOGIX_DP_DEBUG_CTL); /* Power up PLL */ - if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { - analogix_dp_set_pll_power_down(dp, 0); - - while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { - timeout_loop++; - if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) { - dev_err(dp->dev, "failed to get pll lock status\n"); - return -ETIMEDOUT; - } - usleep_range(10, 20); - } - } + analogix_dp_set_pll_power_down(dp, 0); /* Enable Serdes FIFO function and Link symbol clock domain module */ reg = readl(dp->reg_base + ANALOGIX_DP_FUNC_EN_2);