From: Chaitanya Kumar Borah Date: Fri, 23 May 2025 06:20:35 +0000 (+0530) Subject: drm/i915/dsb: add intel_dsb_gosub_finish() X-Git-Tag: io_uring-6.17-20250815~29^2~20^2~59 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=796b6df0f8f57c40e95bd49294cf5f869eab3e9b;p=linux-block.git drm/i915/dsb: add intel_dsb_gosub_finish() A DSB buffer which will be used for GOSUB execution does not need the DEWAKE mechanism but still need to be 64 bit aligned. Add helper to finish preparation of a dsb buffer to be executed with GOSUB instruction. v2: Add a cacheline of noops at the end of GOSUB buffer (Ville) Signed-off-by: Chaitanya Kumar Borah Reviewed-by: Uma Shankar Signed-off-by: Animesh Manna Link: https://lore.kernel.org/r/20250523062041.166468-6-chaitanya.kumar.borah@intel.com --- diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index cd32b59adf18..04c2096df2dc 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -606,6 +606,19 @@ void intel_dsb_gosub(struct intel_dsb *dsb, intel_dsb_align_tail(dsb); } +void intel_dsb_gosub_finish(struct intel_dsb *dsb) +{ + intel_dsb_align_tail(dsb); + + /* + * "All subroutines called by the GOSUB instruction + * must end with a cacheline of NOPs" + */ + intel_dsb_noop(dsb, 8); + + intel_dsb_buffer_flush_map(&dsb->dsb_buf); +} + void intel_dsb_finish(struct intel_dsb *dsb) { struct intel_crtc *crtc = dsb->crtc; diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h index 8b2cf0a7b7e6..6900acd603b8 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.h +++ b/drivers/gpu/drm/i915/display/intel_dsb.h @@ -31,6 +31,7 @@ struct intel_dsb *intel_dsb_prepare(struct intel_atomic_state *state, enum intel_dsb_id dsb_id, unsigned int max_cmds); void intel_dsb_finish(struct intel_dsb *dsb); +void intel_dsb_gosub_finish(struct intel_dsb *dsb); void intel_dsb_cleanup(struct intel_dsb *dsb); void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val);