From: Stephen Boyd Date: Mon, 4 Jun 2018 19:34:51 +0000 (-0700) Subject: Merge branch 'clk-qcom-sdm845' into clk-next X-Git-Tag: for-linus-20180616~21^2~3 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=77122d6f7477899ba6d1b2d340956bd6fd9ee3b5;p=linux-block.git Merge branch 'clk-qcom-sdm845' into clk-next * clk-qcom-sdm845: clk: qcom: Export clk_fabia_pll_configure() clk: qcom: Add video clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Video clock bindings clk: qcom: Add Global Clock controller (GCC) driver for SDM845 clk: qcom: Add DT bindings for SDM845 gcc clock controller clk: qcom: Configure the RCGs to a safe source as needed clk: qcom: Add support for BRANCH_HALT_SKIP flag for branch clocks clk: qcom: Simplify gdsc status checking logic clk: qcom: gdsc: Add support to poll CFG register to check GDSC state clk: qcom: gdsc: Add support to poll for higher timeout value clk: qcom: gdsc: Add support to reset AON and block reset logic clk: qcom: Add support for controlling Fabia PLL clk: qcom: Clear hardware clock control bit of RCG Also fixup the Kconfig mess where SDM845 GCC has msm8998 in the description and also the video Kconfig says things slightly differently from the GCC one so just make it the same. --- 77122d6f7477899ba6d1b2d340956bd6fd9ee3b5 diff --cc Documentation/devicetree/bindings/clock/qcom,gcc.txt index d1fb8b213dde,bf2355d9ada8..664ea1fd6c76 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt @@@ -17,8 -17,8 +17,9 @@@ Required properties "qcom,gcc-msm8974pro-ac" "qcom,gcc-msm8994" "qcom,gcc-msm8996" + "qcom,gcc-msm8998" "qcom,gcc-mdm9615" + "qcom,gcc-sdm845" - reg : shall contain base register location and length - #clock-cells : shall contain 1 diff --cc drivers/clk/qcom/Kconfig index e42e1afb0c51,df9d7f8ccb46..9c3480dcc38a --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@@ -218,14 -218,26 +218,33 @@@ config MSM_MMCC_899 Say Y if you want to support multimedia devices such as display, graphics, video encode/decode, camera, etc. +config MSM_GCC_8998 + tristate "MSM8998 Global Clock Controller" + depends on COMMON_CLK_QCOM + help + Support for the global clock controller on msm8998 devices. + Say Y if you want to use peripheral devices such as UART, SPI, + i2c, USB, UFS, SD/eMMC, PCIe, etc. + + config SDM_GCC_845 + tristate "SDM845 Global Clock Controller" + select QCOM_GDSC + depends on COMMON_CLK_QCOM + help - Support for the global clock controller on msm8998 devices. ++ Support for the global clock controller on SDM845 devices. + Say Y if you want to use peripheral devices such as UART, SPI, - I2C, USB, UFS, SDDC, PCIe, etc. ++ i2C, USB, UFS, SDDC, PCIe, etc. + + config SDM_VIDEOCC_845 + tristate "SDM845 Video Clock Controller" + depends on COMMON_CLK_QCOM + select SDM_GCC_845 + select QCOM_GDSC + help - Support for the video clock controller on Qualcomm Technologies, Inc - SDM845 devices. ++ Support for the video clock controller on SDM845 devices. + Say Y if you want to support video devices and functionality such as + video encode and decode. + config SPMI_PMIC_CLKDIV tristate "SPMI PMIC clkdiv Support" depends on (COMMON_CLK_QCOM && SPMI) || COMPILE_TEST diff --cc drivers/clk/qcom/gdsc.h index 7fd78cec7e5b,b0cbb87dd02b..bd1f2c780d0a --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@@ -53,7 -53,9 +53,10 @@@ struct gdsc #define VOTABLE BIT(0) #define CLAMP_IO BIT(1) #define HW_CTRL BIT(2) - #define ALWAYS_ON BIT(3) + #define SW_RESET BIT(3) + #define AON_RESET BIT(4) + #define POLL_CFG_GDSCR BIT(5) ++#define ALWAYS_ON BIT(6) struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count;