From: Jani Nikula Date: Tue, 4 Jun 2024 15:25:49 +0000 (+0300) Subject: drm/i915: pass dev_priv explicitly to CHV_BLEND X-Git-Tag: io_uring-6.11-20240722~49^2~20^2~108 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=65313768a4e2da9e0abc104afa6d82ee193b01ed;p=linux-block.git drm/i915: pass dev_priv explicitly to CHV_BLEND Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CHV_BLEND register macro. Reviewed-by: Rodrigo Vivi Link: https://patchwork.freedesktop.org/patch/msgid/a2c5064ee3a985f7b7b5c7e672737df447d3af29.1717514638.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 48ee8aee21be..a6d7928fbe37 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2108,7 +2108,8 @@ static void valleyview_crtc_enable(struct intel_atomic_state *state, intel_de_write(dev_priv, VLV_PIPE_MSA_MISC(pipe), 0); if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { - intel_de_write(dev_priv, CHV_BLEND(pipe), CHV_BLEND_LEGACY); + intel_de_write(dev_priv, CHV_BLEND(dev_priv, pipe), + CHV_BLEND_LEGACY); intel_de_write(dev_priv, CHV_CANVAS(pipe), 0); } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 064d14d1e8bb..17422a41a51d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2190,7 +2190,7 @@ #define CHV_CANVAS_GREEN_MASK REG_GENMASK(19, 10) #define CHV_CANVAS_BLUE_MASK REG_GENMASK(9, 0) -#define CHV_BLEND(pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A) +#define CHV_BLEND(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_BLEND_A) #define CHV_CANVAS(pipe) _MMIO_TRANS2(dev_priv, pipe, _CHV_CANVAS_A) /* Display/Sprite base address macros */