From: Krzysztof Kozlowski Date: Sat, 24 Dec 2022 15:42:54 +0000 (+0100) Subject: arm64: dts: qcom: sm8450: re-order GCC clocks X-Git-Tag: io_uring-6.3-2023-03-03~53^2~45^2~195 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=539a9923683c79e6925dd69a2e2534ec197361c7;p=linux-block.git arm64: dts: qcom: sm8450: re-order GCC clocks Bindings expect GCC clocks in other order: sm8450-hdk.dtb: clock-controller@100000: clock-names:1: 'sleep_clk' was expected Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20221224154255.43499-4-krzysztof.kozlowski@linaro.org --- diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 1610f5ea49d2..e42c0b67b6e2 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -740,13 +740,13 @@ #reset-cells = <1>; #power-domain-cells = <1>; clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, <&pcie0_lane>, - <&pcie1_lane>, - <&sleep_clk>; + <&pcie1_lane>; clock-names = "bi_tcxo", + "sleep_clk", "pcie_0_pipe_clk", - "pcie_1_pipe_clk", - "sleep_clk"; + "pcie_1_pipe_clk"; }; gpi_dma2: dma-controller@800000 {