From: Alexander Shiyan Date: Sun, 14 Feb 2021 06:30:38 +0000 (+0300) Subject: ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX X-Git-Tag: io_uring-5.13-2021-05-07~82^2~46^2~13 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=51c045ec31958be881973733766d7ceb67c3e7aa;p=linux-2.6-block.git ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX Board uses 4-wire synchronous mode for audio, so add SYN bit for PTCR AUDMUX registers. Signed-off-by: Alexander Shiyan Signed-off-by: Shawn Guo --- diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi index d434868e870a..10abb47b46b9 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi @@ -78,7 +78,8 @@ ssi2 { fsl,audmux-port = <1>; fsl,port-config = < - (IMX_AUDMUX_V2_PTCR_TFSDIR | + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSDIR | IMX_AUDMUX_V2_PTCR_TFSEL(4) | IMX_AUDMUX_V2_PTCR_TCLKDIR | IMX_AUDMUX_V2_PTCR_TCSEL(4)) @@ -89,7 +90,7 @@ pins5 { fsl,audmux-port = <4>; fsl,port-config = < - 0x00000000 + IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(1) >; };