From: Franklin S Cooper Jr Date: Thu, 10 Aug 2017 16:50:14 +0000 (-0700) Subject: dt-bindings: net: c_can: Update binding for clock and power-domains property X-Git-Tag: v4.14-rc1~66^2~23^2~4 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=42eaad808741a47aeb9b79eedc4ef46ca71fef2b;p=linux-block.git dt-bindings: net: c_can: Update binding for clock and power-domains property CAN driver uses the clk_get_rate call to determine the frequency of the functional clock. OMAP based SoCs do not require the clock property since hwmod already handles creating a "fck" clock thats accessible to drivers. However, this isn't the case for 66AK2G which makes the clocks property require for that SoC. 66AK2G requires a new property. Therefore, update the binding to also make this property requirement clear. Also clarify that for OMAP based SoCs ti,hwmod is a required property. Signed-off-by: Franklin S Cooper Jr Signed-off-by: Santosh Shilimkar --- diff --git a/Documentation/devicetree/bindings/net/can/c_can.txt b/Documentation/devicetree/bindings/net/can/c_can.txt index 5a1d8b0c39e9..2d504256b0d8 100644 --- a/Documentation/devicetree/bindings/net/can/c_can.txt +++ b/Documentation/devicetree/bindings/net/can/c_can.txt @@ -11,9 +11,20 @@ Required properties: - interrupts : property with a value describing the interrupt number -Optional properties: +The following are mandatory properties for DRA7x, AM33xx and AM43xx SoCs only: - ti,hwmods : Must be "d_can" or "c_can", n being the instance number + +The following are mandatory properties for Keystone 2 66AK2G SoCs only: +- power-domains : Should contain a phandle to a PM domain provider node + and an args specifier containing the DCAN device id + value. This property is as per the binding, + Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt +- clocks : CAN functional clock phandle. This property is as per the + binding, + Documentation/devicetree/bindings/clock/ti,sci-clk.txt + +Optional properties: - syscon-raminit : Handle to system control region that contains the RAMINIT register, register offset to the RAMINIT register and the CAN instance number (0 offset).