From: Jani Nikula Date: Fri, 5 Apr 2024 19:37:40 +0000 (+0300) Subject: drm/i915: move i915_fixed.h to display/intel_fixed.h X-Git-Tag: io_uring-6.10-20240523~68^2~22^2~40 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=337ce2067a2ebdd57e8f22df2b70a1ecd7f9cc9a;p=linux-block.git drm/i915: move i915_fixed.h to display/intel_fixed.h All the users are in display, move the fixed point header under display. We could also consider making these more general purpose things, but that takes a bunch more effort. This allows the immediate cleanup of xe compat i915_fixed.h. Cc: Lucas De Marchi Reviewed-by: Lucas De Marchi Link: https://patchwork.freedesktop.org/patch/msgid/320c451e116c7807e544a50c67ba79b087a4f218.1712345787.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_fixed.h b/drivers/gpu/drm/i915/display/intel_fixed.h new file mode 100644 index 000000000000..a327094de2bd --- /dev/null +++ b/drivers/gpu/drm/i915/display/intel_fixed.h @@ -0,0 +1,148 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2018 Intel Corporation + */ + +#ifndef _I915_FIXED_H_ +#define _I915_FIXED_H_ + +#include +#include +#include +#include + +typedef struct { + u32 val; +} uint_fixed_16_16_t; + +#define FP_16_16_MAX ((uint_fixed_16_16_t){ .val = UINT_MAX }) + +static inline bool is_fixed16_zero(uint_fixed_16_16_t val) +{ + return val.val == 0; +} + +static inline uint_fixed_16_16_t u32_to_fixed16(u32 val) +{ + uint_fixed_16_16_t fp = { .val = val << 16 }; + + WARN_ON(val > U16_MAX); + + return fp; +} + +static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp) +{ + return DIV_ROUND_UP(fp.val, 1 << 16); +} + +static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp) +{ + return fp.val >> 16; +} + +static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1, + uint_fixed_16_16_t min2) +{ + uint_fixed_16_16_t min = { .val = min(min1.val, min2.val) }; + + return min; +} + +static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1, + uint_fixed_16_16_t max2) +{ + uint_fixed_16_16_t max = { .val = max(max1.val, max2.val) }; + + return max; +} + +static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val) +{ + uint_fixed_16_16_t fp = { .val = (u32)val }; + + WARN_ON(val > U32_MAX); + + return fp; +} + +static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val, + uint_fixed_16_16_t d) +{ + return DIV_ROUND_UP(val.val, d.val); +} + +static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) +{ + u64 tmp; + + tmp = mul_u32_u32(val, mul.val); + tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16); + WARN_ON(tmp > U32_MAX); + + return (u32)tmp; +} + +static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, + uint_fixed_16_16_t mul) +{ + u64 tmp; + + tmp = mul_u32_u32(val.val, mul.val); + tmp = tmp >> 16; + + return clamp_u64_to_fixed16(tmp); +} + +static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d) +{ + u64 tmp; + + tmp = (u64)val << 16; + tmp = DIV_ROUND_UP_ULL(tmp, d); + + return clamp_u64_to_fixed16(tmp); +} + +static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d) +{ + u64 tmp; + + tmp = (u64)val << 16; + tmp = DIV_ROUND_UP_ULL(tmp, d.val); + WARN_ON(tmp > U32_MAX); + + return (u32)tmp; +} + +static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) +{ + u64 tmp; + + tmp = mul_u32_u32(val, mul.val); + + return clamp_u64_to_fixed16(tmp); +} + +static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1, + uint_fixed_16_16_t add2) +{ + u64 tmp; + + tmp = (u64)add1.val + add2.val; + + return clamp_u64_to_fixed16(tmp); +} + +static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1, + u32 add2) +{ + uint_fixed_16_16_t tmp_add2 = u32_to_fixed16(add2); + u64 tmp; + + tmp = (u64)add1.val + tmp_add2.val; + + return clamp_u64_to_fixed16(tmp); +} + +#endif /* _I915_FIXED_H_ */ diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 50ec51065118..8436af8525da 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -6,7 +6,6 @@ #include #include "i915_drv.h" -#include "i915_fixed.h" #include "i915_reg.h" #include "i9xx_wm.h" #include "intel_atomic.h" @@ -19,6 +18,7 @@ #include "intel_display_power.h" #include "intel_display_types.h" #include "intel_fb.h" +#include "intel_fixed.h" #include "intel_pcode.h" #include "intel_wm.h" #include "skl_watermark.h" diff --git a/drivers/gpu/drm/i915/i915_fixed.h b/drivers/gpu/drm/i915/i915_fixed.h deleted file mode 100644 index a327094de2bd..000000000000 --- a/drivers/gpu/drm/i915/i915_fixed.h +++ /dev/null @@ -1,148 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2018 Intel Corporation - */ - -#ifndef _I915_FIXED_H_ -#define _I915_FIXED_H_ - -#include -#include -#include -#include - -typedef struct { - u32 val; -} uint_fixed_16_16_t; - -#define FP_16_16_MAX ((uint_fixed_16_16_t){ .val = UINT_MAX }) - -static inline bool is_fixed16_zero(uint_fixed_16_16_t val) -{ - return val.val == 0; -} - -static inline uint_fixed_16_16_t u32_to_fixed16(u32 val) -{ - uint_fixed_16_16_t fp = { .val = val << 16 }; - - WARN_ON(val > U16_MAX); - - return fp; -} - -static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp) -{ - return DIV_ROUND_UP(fp.val, 1 << 16); -} - -static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp) -{ - return fp.val >> 16; -} - -static inline uint_fixed_16_16_t min_fixed16(uint_fixed_16_16_t min1, - uint_fixed_16_16_t min2) -{ - uint_fixed_16_16_t min = { .val = min(min1.val, min2.val) }; - - return min; -} - -static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1, - uint_fixed_16_16_t max2) -{ - uint_fixed_16_16_t max = { .val = max(max1.val, max2.val) }; - - return max; -} - -static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val) -{ - uint_fixed_16_16_t fp = { .val = (u32)val }; - - WARN_ON(val > U32_MAX); - - return fp; -} - -static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val, - uint_fixed_16_16_t d) -{ - return DIV_ROUND_UP(val.val, d.val); -} - -static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) -{ - u64 tmp; - - tmp = mul_u32_u32(val, mul.val); - tmp = DIV_ROUND_UP_ULL(tmp, 1 << 16); - WARN_ON(tmp > U32_MAX); - - return (u32)tmp; -} - -static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, - uint_fixed_16_16_t mul) -{ - u64 tmp; - - tmp = mul_u32_u32(val.val, mul.val); - tmp = tmp >> 16; - - return clamp_u64_to_fixed16(tmp); -} - -static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d) -{ - u64 tmp; - - tmp = (u64)val << 16; - tmp = DIV_ROUND_UP_ULL(tmp, d); - - return clamp_u64_to_fixed16(tmp); -} - -static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d) -{ - u64 tmp; - - tmp = (u64)val << 16; - tmp = DIV_ROUND_UP_ULL(tmp, d.val); - WARN_ON(tmp > U32_MAX); - - return (u32)tmp; -} - -static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) -{ - u64 tmp; - - tmp = mul_u32_u32(val, mul.val); - - return clamp_u64_to_fixed16(tmp); -} - -static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1, - uint_fixed_16_16_t add2) -{ - u64 tmp; - - tmp = (u64)add1.val + add2.val; - - return clamp_u64_to_fixed16(tmp); -} - -static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1, - u32 add2) -{ - uint_fixed_16_16_t tmp_add2 = u32_to_fixed16(add2); - u64 tmp; - - tmp = (u64)add1.val + tmp_add2.val; - - return clamp_u64_to_fixed16(tmp); -} - -#endif /* _I915_FIXED_H_ */ diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h b/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h deleted file mode 100644 index 12c671fd5235..000000000000 --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_fixed.h +++ /dev/null @@ -1,6 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2023 Intel Corporation - */ - -#include "../../i915/i915_fixed.h"