From: Steve Wise Date: Tue, 6 Aug 2013 15:34:36 +0000 (+0530) Subject: RDMA/cxgb4: Fix accounting for unsignaled SQ WRs to deal with wrap X-Git-Tag: v3.12-rc1~139^2~5 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=27ca34f54a70cb85895aa7147a6c35f1cd07fa55;p=linux-2.6-block.git RDMA/cxgb4: Fix accounting for unsignaled SQ WRs to deal with wrap When determining how many WRs are completed with a signaled CQE, correctly deal with queue wraps. Signed-off-by: Steve Wise Signed-off-by: Vipul Pandya Signed-off-by: Roland Dreier --- diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c index 6657390de956..88de3aa9c5b0 100644 --- a/drivers/infiniband/hw/cxgb4/cq.c +++ b/drivers/infiniband/hw/cxgb4/cq.c @@ -611,9 +611,12 @@ proc_cqe: * to the first unsignaled one, and idx points to the * signaled one. So adjust in_use based on this delta. * if this is not completing any unsigned wrs, then the - * delta will be 0. + * delta will be 0. Handle wrapping also! */ - wq->sq.in_use -= idx - wq->sq.cidx; + if (idx < wq->sq.cidx) + wq->sq.in_use -= wq->sq.size + idx - wq->sq.cidx; + else + wq->sq.in_use -= idx - wq->sq.cidx; BUG_ON(wq->sq.in_use < 0 && wq->sq.in_use < wq->sq.size); wq->sq.cidx = (uint16_t)idx;