From: Philipp Zabel Date: Fri, 27 Jun 2025 11:45:41 +0000 (+0200) Subject: drm/mipi-dsi: Drop MIPI_DSI_MODE_VSYNC_FLUSH flag X-Git-Tag: io_uring-6.17-20250815~29^2~16^2~1 X-Git-Url: https://git.kernel.dk/?a=commitdiff_plain;h=12853b279100adc7074b51db23bf62a41cb84cb8;p=linux-block.git drm/mipi-dsi: Drop MIPI_DSI_MODE_VSYNC_FLUSH flag Drop the unused MIPI_DSI_MODE_VSYNC_FLUSH flag. Whether or not a display FIFO flush on vsync is required to avoid sending garbage to the panel is not a property of the DSI link, but of the integration between display controller and DSI host bridge. Acked-by: Marek Szyprowski Acked-by: Neil Armstrong Link: https://lore.kernel.org/r/20250627-dsi-vsync-flush-v2-4-4066899a5608@pengutronix.de Signed-off-by: Philipp Zabel --- diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index b37860f4a895..369b0d8830c3 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -130,8 +130,6 @@ struct mipi_dsi_host *of_find_mipi_dsi_host_by_node(struct device_node *node); #define MIPI_DSI_MODE_VIDEO_NO_HBP BIT(6) /* disable hsync-active area */ #define MIPI_DSI_MODE_VIDEO_NO_HSA BIT(7) -/* flush display FIFO on vsync pulse */ -#define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8) /* disable EoT packets in HS mode */ #define MIPI_DSI_MODE_NO_EOT_PACKET BIT(9) /* device supports non-continuous clock behavior (DSI spec 5.6.1) */