ARM: imx51: use clock defines in DTS files
authorLucas Stach <l.stach@pengutronix.de>
Thu, 14 Nov 2013 10:18:59 +0000 (11:18 +0100)
committerShawn Guo <shawn.guo@linaro.org>
Sun, 9 Feb 2014 13:32:42 +0000 (21:32 +0800)
For better readability and no need to look up numbers
in the documentation anymore.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx51.dtsi

index bb958f944c25836c7feaf259f27a2c8a7d316b6d..279aa1e8ba2ff80876c0e4f06e1b0ac045c26bf3 100644 (file)
@@ -13,6 +13,7 @@
 #include "skeleton.dtsi"
 #include "imx51-pinfunc.h"
 #include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/imx5-clock.h>
 
 / {
        aliases {
@@ -70,7 +71,8 @@
                        compatible = "arm,cortex-a8";
                        reg = <0>;
                        clock-latency = <62500>;
-                       clocks = <&clks 24>;
+                       clocks = <&clks IMX5_CLK_CPU_PODF>;
+                       clock-names = "cpu";
                        operating-points = <
                                166000  1000000
                                600000  1050000
@@ -97,7 +99,9 @@
                        compatible = "fsl,imx51-ipu";
                        reg = <0x40000000 0x20000000>;
                        interrupts = <11 10>;
-                       clocks = <&clks 59>, <&clks 110>, <&clks 61>;
+                       clocks = <&clks IMX5_CLK_IPU_GATE>,
+                                <&clks IMX5_CLK_IPU_DI0_GATE>,
+                                <&clks IMX5_CLK_IPU_DI1_GATE>;
                        clock-names = "bus", "di0", "di1";
                        resets = <&src 2>;
                };
                                        compatible = "fsl,imx51-esdhc";
                                        reg = <0x70004000 0x4000>;
                                        interrupts = <1>;
-                                       clocks = <&clks 44>, <&clks 0>, <&clks 71>;
+                                       clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC1_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        status = "disabled";
                                };
                                        compatible = "fsl,imx51-esdhc";
                                        reg = <0x70008000 0x4000>;
                                        interrupts = <2>;
-                                       clocks = <&clks 45>, <&clks 0>, <&clks 72>;
+                                       clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC2_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                        reg = <0x7000c000 0x4000>;
                                        interrupts = <33>;
-                                       clocks = <&clks 32>, <&clks 33>;
+                                       clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
+                                                <&clks IMX5_CLK_UART3_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        compatible = "fsl,imx51-ecspi";
                                        reg = <0x70010000 0x4000>;
                                        interrupts = <36>;
-                                       clocks = <&clks 51>, <&clks 52>;
+                                       clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
+                                                <&clks IMX5_CLK_ECSPI1_PER_GATE>;
                                        clock-names = "ipg", "per";
                                        status = "disabled";
                                };
                                        compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
                                        reg = <0x70014000 0x4000>;
                                        interrupts = <30>;
-                                       clocks = <&clks 49>;
+                                       clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>;
                                        dmas = <&sdma 24 1 0>,
                                               <&sdma 25 1 0>;
                                        dma-names = "rx", "tx";
                                        compatible = "fsl,imx51-esdhc";
                                        reg = <0x70020000 0x4000>;
                                        interrupts = <3>;
-                                       clocks = <&clks 46>, <&clks 0>, <&clks 73>;
+                                       clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC3_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
                                        compatible = "fsl,imx51-esdhc";
                                        reg = <0x70024000 0x4000>;
                                        interrupts = <4>;
-                                       clocks = <&clks 47>, <&clks 0>, <&clks 74>;
+                                       clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
+                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks IMX5_CLK_ESDHC4_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
                                        status = "disabled";
 
                        usbphy0: usbphy@0 {
                                compatible = "usb-nop-xceiv";
-                               clocks = <&clks 75>;
+                               clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
                                clock-names = "main_clk";
                                status = "okay";
                        };
                                compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                reg = <0x73f80000 0x0200>;
                                interrupts = <18>;
-                               clocks = <&clks 108>;
+                               clocks = <&clks IMX5_CLK_USBOH3_GATE>;
                                fsl,usbmisc = <&usbmisc 0>;
                                fsl,usbphy = <&usbphy0>;
                                status = "disabled";
                                compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                reg = <0x73f80200 0x0200>;
                                interrupts = <14>;
-                               clocks = <&clks 108>;
+                               clocks = <&clks IMX5_CLK_USBOH3_GATE>;
                                fsl,usbmisc = <&usbmisc 1>;
                                status = "disabled";
                        };
                                compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                reg = <0x73f80400 0x0200>;
                                interrupts = <16>;
-                               clocks = <&clks 108>;
+                               clocks = <&clks IMX5_CLK_USBOH3_GATE>;
                                fsl,usbmisc = <&usbmisc 2>;
                                status = "disabled";
                        };
                                compatible = "fsl,imx51-usb", "fsl,imx27-usb";
                                reg = <0x73f80600 0x0200>;
                                interrupts = <17>;
-                               clocks = <&clks 108>;
+                               clocks = <&clks IMX5_CLK_USBOH3_GATE>;
                                fsl,usbmisc = <&usbmisc 3>;
                                status = "disabled";
                        };
                                #index-cells = <1>;
                                compatible = "fsl,imx51-usbmisc";
                                reg = <0x73f80800 0x200>;
-                               clocks = <&clks 108>;
+                               clocks = <&clks IMX5_CLK_USBOH3_GATE>;
                        };
 
                        gpio1: gpio@73f84000 {
                                compatible = "fsl,imx51-kpp", "fsl,imx21-kpp";
                                reg = <0x73f94000 0x4000>;
                                interrupts = <60>;
-                               clocks = <&clks 0>;
+                               clocks = <&clks IMX5_CLK_DUMMY>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                reg = <0x73f98000 0x4000>;
                                interrupts = <58>;
-                               clocks = <&clks 0>;
+                               clocks = <&clks IMX5_CLK_DUMMY>;
                        };
 
                        wdog2: wdog@73f9c000 {
                                compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
                                reg = <0x73f9c000 0x4000>;
                                interrupts = <59>;
-                               clocks = <&clks 0>;
+                               clocks = <&clks IMX5_CLK_DUMMY>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-gpt", "fsl,imx31-gpt";
                                reg = <0x73fa0000 0x4000>;
                                interrupts = <39>;
-                               clocks = <&clks 36>, <&clks 41>;
+                               clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
+                                        <&clks IMX5_CLK_GPT_HF_GATE>;
                                clock-names = "ipg", "per";
                        };
 
                                #pwm-cells = <2>;
                                compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
                                reg = <0x73fb4000 0x4000>;
-                               clocks = <&clks 37>, <&clks 38>;
+                               clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
+                                        <&clks IMX5_CLK_PWM1_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <61>;
                        };
                                #pwm-cells = <2>;
                                compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
                                reg = <0x73fb8000 0x4000>;
-                               clocks = <&clks 39>, <&clks 40>;
+                               clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
+                                        <&clks IMX5_CLK_PWM2_HF_GATE>;
                                clock-names = "ipg", "per";
                                interrupts = <94>;
                        };
                                compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                reg = <0x73fbc000 0x4000>;
                                interrupts = <31>;
-                               clocks = <&clks 28>, <&clks 29>;
+                               clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
+                                        <&clks IMX5_CLK_UART1_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                compatible = "fsl,imx51-uart", "fsl,imx21-uart";
                                reg = <0x73fc0000 0x4000>;
                                interrupts = <32>;
-                               clocks = <&clks 30>, <&clks 31>;
+                               clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
+                                        <&clks IMX5_CLK_UART2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                compatible = "fsl,imx51-iim", "fsl,imx27-iim";
                                reg = <0x83f98000 0x4000>;
                                interrupts = <69>;
-                               clocks = <&clks 107>;
+                               clocks = <&clks IMX5_CLK_IIM_GATE>;
                        };
 
                        owire: owire@83fa4000 {
                                compatible = "fsl,imx51-owire", "fsl,imx21-owire";
                                reg = <0x83fa4000 0x4000>;
                                interrupts = <88>;
-                               clocks = <&clks 159>;
+                               clocks = <&clks IMX5_CLK_OWIRE_GATE>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-ecspi";
                                reg = <0x83fac000 0x4000>;
                                interrupts = <37>;
-                               clocks = <&clks 53>, <&clks 54>;
+                               clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
+                                        <&clks IMX5_CLK_ECSPI2_PER_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
                                reg = <0x83fb0000 0x4000>;
                                interrupts = <6>;
-                               clocks = <&clks 56>, <&clks 56>;
+                               clocks = <&clks IMX5_CLK_SDMA_GATE>,
+                                        <&clks IMX5_CLK_SDMA_GATE>;
                                clock-names = "ipg", "ahb";
                                #dma-cells = <3>;
                                fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
                                compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
                                reg = <0x83fc0000 0x4000>;
                                interrupts = <38>;
-                               clocks = <&clks 55>, <&clks 55>;
+                               clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
+                                        <&clks IMX5_CLK_CSPI_IPG_GATE>;
                                clock-names = "ipg", "per";
                                status = "disabled";
                        };
                                compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
                                reg = <0x83fc4000 0x4000>;
                                interrupts = <63>;
-                               clocks = <&clks 35>;
+                               clocks = <&clks IMX5_CLK_I2C2_GATE>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
                                reg = <0x83fc8000 0x4000>;
                                interrupts = <62>;
-                               clocks = <&clks 34>;
+                               clocks = <&clks IMX5_CLK_I2C1_GATE>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
                                reg = <0x83fcc000 0x4000>;
                                interrupts = <29>;
-                               clocks = <&clks 48>;
+                               clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>;
                                dmas = <&sdma 28 0 0>,
                                       <&sdma 29 0 0>;
                                dma-names = "rx", "tx";
                        audmux: audmux@83fd0000 {
                                compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
                                reg = <0x83fd0000 0x4000>;
-                               clocks = <&clks 0>;
+                               clocks = <&clks IMX5_CLK_DUMMY>;
                                clock-names = "audmux";
                                status = "disabled";
                        };
                                #size-cells = <1>;
                                compatible = "fsl,imx51-weim";
                                reg = <0x83fda000 0x1000>;
-                               clocks = <&clks 57>;
+                               clocks = <&clks IMX5_CLK_EMI_SLOW_GATE>;
                                ranges = <
                                        0 0 0xb0000000 0x08000000
                                        1 0 0xb8000000 0x08000000
                                compatible = "fsl,imx51-nand";
                                reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
                                interrupts = <8>;
-                               clocks = <&clks 60>;
+                               clocks = <&clks IMX5_CLK_NFC_GATE>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-pata", "fsl,imx27-pata";
                                reg = <0x83fe0000 0x4000>;
                                interrupts = <70>;
-                               clocks = <&clks 172>;
+                               clocks = <&clks IMX5_CLK_PATA_GATE>;
                                status = "disabled";
                        };
 
                                compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
                                reg = <0x83fe8000 0x4000>;
                                interrupts = <96>;
-                               clocks = <&clks 50>;
+                               clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>;
                                dmas = <&sdma 46 0 0>,
                                       <&sdma 47 0 0>;
                                dma-names = "rx", "tx";
                                compatible = "fsl,imx51-fec", "fsl,imx27-fec";
                                reg = <0x83fec000 0x4000>;
                                interrupts = <87>;
-                               clocks = <&clks 42>, <&clks 42>, <&clks 42>;
+                               clocks = <&clks IMX5_CLK_FEC_GATE>,
+                                        <&clks IMX5_CLK_FEC_GATE>,
+                                        <&clks IMX5_CLK_FEC_GATE>;
                                clock-names = "ipg", "ahb", "ptp";
                                status = "disabled";
                        };