arm64: dts: qcom: sm8450-hdk: model the PMU of the on-board wcn6855

Add nodes for the WCN6855 PMU, the WLAN and BT modules and relevant
regulators and pin functions to fully describe how the wifi is actually
wired on this platform.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241018-sc8280xp-pwrseq-v6-6-8da8310d9564@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index 67443822653da6c84cea6627ada90424a54e7a88..2ff40a120aadf9e7556bb568b5c99847584189fa 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -26,6 +26,7 @@
 
        aliases {
                serial0 = &uart7;
+               serial1 = &uart20;
        };
 
        wcd938x: audio-codec {
@@ -247,6 +248,71 @@
                };
        };
 
+       wcn6855-pmu {
+               compatible = "qcom,wcn6855-pmu";
+
+               pinctrl-0 = <&bt_en>, <&wlan_en>, <&xo_clk_default>;
+               pinctrl-names = "default";
+
+               wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>;
+               bt-enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
+               swctrl-gpios = <&tlmm 82 GPIO_ACTIVE_HIGH>;
+               xo-clk-gpios = <&tlmm 204 GPIO_ACTIVE_HIGH>;
+
+               vddio-supply = <&vreg_s10b_1p8>;
+               vddaon-supply = <&vreg_s11b_0p95>;
+               vddpmu-supply = <&vreg_s12b_1p25>;
+               vddpmumx-supply = <&vreg_s2e_0p85>;
+               vddpmucx-supply = <&vreg_s11b_0p95>;
+               vddrfa0p95-supply = <&vreg_s11b_0p95>;
+               vddrfa1p3-supply = <&vreg_s12b_1p25>;
+               vddrfa1p9-supply = <&vreg_s1c_1p86>;
+               vddpcie1p3-supply = <&vreg_s12b_1p25>;
+               vddpcie1p9-supply = <&vreg_s1c_1p86>;
+
+               regulators {
+                       vreg_pmu_rfa_cmn_0p8: ldo0 {
+                               regulator-name = "vreg_pmu_rfa_cmn_0p8";
+                       };
+
+                       vreg_pmu_aon_0p8: ldo1 {
+                               regulator-name = "vreg_pmu_aon_0p8";
+                       };
+
+                       vreg_pmu_wlcx_0p8: ldo2 {
+                               regulator-name = "vreg_pmu_wlcx_0p8";
+                       };
+
+                       vreg_pmu_wlmx_0p8: ldo3 {
+                               regulator-name = "vreg_pmu_wlmx_0p8";
+                       };
+
+                       vreg_pmu_btcmx_0p8: ldo4 {
+                               regulator-name = "vreg_pmu_btcmx_0p8";
+                       };
+
+                       vreg_pmu_pcie_1p8: ldo5 {
+                               regulator-name = "vreg_pmu_pcie_1p8";
+                       };
+
+                       vreg_pmu_pcie_0p9: ldo6 {
+                               regulator-name = "vreg_pmu_pcie_0p9";
+                       };
+
+                       vreg_pmu_rfa_0p8: ldo7 {
+                               regulator-name = "vreg_pmu_rfa_0p8";
+                       };
+
+                       vreg_pmu_rfa_1p2: ldo8 {
+                               regulator-name = "vreg_pmu_rfa_1p2";
+                       };
+
+                       vreg_pmu_rfa_1p7: ldo9 {
+                               regulator-name = "vreg_pmu_rfa_1p7";
+                       };
+               };
+       };
+
        vph_pwr: vph-pwr-regulator {
                compatible = "regulator-fixed";
                regulator-name = "vph_pwr";
@@ -685,6 +751,23 @@
        vdda-pll-supply = <&vreg_l6b_1p2>;
 };
 
+&pcieport0 {
+       wifi@0 {
+               compatible = "pci17cb,1103";
+               reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+               vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
+               vddaon-supply = <&vreg_pmu_aon_0p8>;
+               vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
+               vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
+               vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
+               vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
+               vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+               vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+               vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
+       };
+};
+
 &pcie1 {
        status = "okay";
 };
@@ -892,6 +975,10 @@
        status = "okay";
 };
 
+&qupv3_id_2 {
+       status = "okay";
+};
+
 &sdhc_2 {
        cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
        pinctrl-names = "default", "sleep";
@@ -1069,6 +1156,26 @@
        status = "okay";
 };
 
+&uart20 {
+       pinctrl-0 = <&uart20_default>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       bluetooth {
+               compatible = "qcom,wcn6855-bt";
+
+               vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
+               vddaon-supply = <&vreg_pmu_aon_0p8>;
+               vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
+               vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
+               vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;
+               vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+               vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+               vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
+       };
+};
+
 &ufs_mem_hc {
        status = "okay";
 
@@ -1130,6 +1237,14 @@
 };
 
 &tlmm {
+       bt_en: bt-en-state {
+               pins = "gpio81";
+               function = "gpio";
+               drive-strength = <16>;
+               output-low;
+               bias-pull-down;
+       };
+
        spkr_1_sd_n_active: spkr-1-sd-n-active-state {
                pins = "gpio1";
                function = "gpio";
@@ -1153,4 +1268,46 @@
                bias-disable;
                output-low;
        };
+
+       wlan_en: wlan-en-state {
+               pins = "gpio80";
+               function = "gpio";
+               drive-strength = <16>;
+               output-low;
+               bias-pull-down;
+       };
+
+       uart20_default: uart20-default-state {
+               cts-pins {
+                       pins = "gpio76";
+                       function = "qup20";
+                       bias-disable;
+               };
+
+               rts-pins {
+                       pins = "gpio77";
+                       function = "qup20";
+                       bias-disable;
+               };
+
+               rx-pins {
+                       pins = "gpio78";
+                       function = "qup20";
+                       bias-disable;
+               };
+
+               tx-pins {
+                       pins = "gpio79";
+                       function = "qup20";
+                       bias-disable;
+               };
+       };
+
+       xo_clk_default: xo-clk-state {
+               pins = "gpio204";
+               function = "gpio";
+               drive-strength = <16>;
+               output-low;
+               bias-pull-down;
+       };
 };

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 65f57b99a6c6b4f37c7004f92065de1e1483a781..de234a970e353b7706bac4968d19fb787a8239b3 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1882,7 +1882,7 @@
                                };
                        };
 
-                       pcie@0 {
+                       pcieport0: pcie@0 {
                                device_type = "pci";
                                reg = <0x0 0x0 0x0 0x0 0x0>;
                                bus-range = <0x01 0xff>;