drm/xe/mtl: Reduce Wa_14018575942 scope to the CCS engine

The MTL version of Wa_14018575942 has been updated to suggest only
applying the register change on the CCS engine.

Note that DG2 and PVC have a functionally equivalent workaround with
Wa_18018781329; for now that one is still applying to all engines,
although we'll keep an eye on it in case it changes to be CCS-specific
too.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20230728175601.2343755-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 21087f7a4609fa7f7fb0ca3d4cbb563e9881f03d..36c80e9fb758608ec1f40c10c1b12e0f84f6f260 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -238,21 +238,13 @@ static const struct xe_rtp_entry_sr gt_was[] = {
        },
        { XE_RTP_NAME("14018575942"),
          XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1270, 1271)),
-         XE_RTP_ACTIONS(SET(RENDER_MOD_CTRL, FORCE_MISS_FTLB),
-                        SET(COMP_MOD_CTRL, FORCE_MISS_FTLB))
+         XE_RTP_ACTIONS(SET(COMP_MOD_CTRL, FORCE_MISS_FTLB))
        },
        { XE_RTP_NAME("22016670082"),
          XE_RTP_RULES(GRAPHICS_VERSION_RANGE(1270, 1271)),
          XE_RTP_ACTIONS(SET(SQCNT1, ENFORCE_RAR))
        },
 
-       /* Xe_LPM+ */
-       { XE_RTP_NAME("14018575942"),
-         XE_RTP_RULES(MEDIA_VERSION(1300)),
-         XE_RTP_ACTIONS(SET(XELPMP_VDBX_MOD_CTRL, FORCE_MISS_FTLB),
-                        SET(XELPMP_VEBX_MOD_CTRL, FORCE_MISS_FTLB))
-       },
-
        {}
 };