if (ieee->pHTInfo->bCurrentHTSupport)
HT_update_self_and_peer_setting(ieee, net);
- ieee->pHTInfo->bCurrentRT2RTLongSlotTime =
- net->bssht.bdRT2RTLongSlotTime;
+ ieee->pHTInfo->bCurrentRT2RTLongSlotTime = net->bssht.bd_rt2rt_long_slot_time;
ieee->pHTInfo->RT2RT_HT_Mode = net->bssht.RT2RT_HT_Mode;
_rtl92e_update_cap(dev, net->capability);
}
enum ht_channel_width bd_bandwidth;
u8 bd_rt2rt_aggregation;
- u8 bdRT2RTLongSlotTime;
+ u8 bd_rt2rt_long_slot_time;
u8 RT2RT_HT_Mode;
u8 bdHT1R;
};
pBssHT->bd_ht_spec_ver = HT_SPEC_VER_IEEE;
pBssHT->bd_rt2rt_aggregation = false;
- pBssHT->bdRT2RTLongSlotTime = false;
+ pBssHT->bd_rt2rt_long_slot_time = false;
pBssHT->RT2RT_HT_Mode = (enum rt_ht_capability)0;
}
pHTInfo->bCurrentRT2RTAggregation =
pNetwork->bssht.bd_rt2rt_aggregation;
pHTInfo->bCurrentRT2RTLongSlotTime =
- pNetwork->bssht.bdRT2RTLongSlotTime;
+ pNetwork->bssht.bd_rt2rt_long_slot_time;
pHTInfo->RT2RT_HT_Mode = pNetwork->bssht.RT2RT_HT_Mode;
} else {
pHTInfo->bCurrentRT2RTAggregation = false;
if ((ht_realtek_agg_buf[4] == 1) &&
(ht_realtek_agg_buf[5] & 0x02))
- network->bssht.bdRT2RTLongSlotTime = true;
+ network->bssht.bd_rt2rt_long_slot_time = true;
if ((ht_realtek_agg_buf[4] == 1) &&
(ht_realtek_agg_buf[5] & RT_HT_CAP_USE_92SE))
memcpy(dst->bssht.bd_ht_info_buf, src->bssht.bd_ht_info_buf,
src->bssht.bd_ht_info_len);
dst->bssht.bd_ht_spec_ver = src->bssht.bd_ht_spec_ver;
- dst->bssht.bdRT2RTLongSlotTime = src->bssht.bdRT2RTLongSlotTime;
+ dst->bssht.bd_rt2rt_long_slot_time = src->bssht.bd_rt2rt_long_slot_time;
dst->broadcom_cap_exist = src->broadcom_cap_exist;
dst->ralink_cap_exist = src->ralink_cap_exist;
dst->atheros_cap_exist = src->atheros_cap_exist;