drm/amd/display: Update DCN35 watermarks

[Why & How]
Update to the new values per HW team request. Affects both stutter
and z8.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index 507a7cf56711f3d83d62e64e4c7f417d8b8ab398..3469f692d6ea12bb81900b2adf92a664f9ec8ec1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
@@ -443,32 +443,32 @@ static struct wm_table ddr5_wm_table = {
                        .wm_inst = WM_A,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 9,
-                       .sr_enter_plus_exit_time_us = 11,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_B,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 9,
-                       .sr_enter_plus_exit_time_us = 11,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_C,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 9,
-                       .sr_enter_plus_exit_time_us = 11,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_D,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 9,
-                       .sr_enter_plus_exit_time_us = 11,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
        }
@@ -480,32 +480,32 @@ static struct wm_table lpddr5_wm_table = {
                        .wm_inst = WM_A,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.65333,
-                       .sr_exit_time_us = 11.5,
-                       .sr_enter_plus_exit_time_us = 14.5,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_B,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.65333,
-                       .sr_exit_time_us = 11.5,
-                       .sr_enter_plus_exit_time_us = 14.5,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_C,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.65333,
-                       .sr_exit_time_us = 11.5,
-                       .sr_enter_plus_exit_time_us = 14.5,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_D,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.65333,
-                       .sr_exit_time_us = 11.5,
-                       .sr_enter_plus_exit_time_us = 14.5,
+                       .sr_exit_time_us = 14.0,
+                       .sr_enter_plus_exit_time_us = 16.0,
                        .valid = true,
                },
        }

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
index dee80429fc4c89d54cdf5c88864dd7e450482640..30d78ad91b9cb2360da383a7cbe868d792473edc 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
@@ -164,10 +164,10 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
                },
        },
        .num_states = 5,
-       .sr_exit_time_us = 9.0,
-       .sr_enter_plus_exit_time_us = 11.0,
-       .sr_exit_z8_time_us = 50.0, /*changed from 442.0*/
-       .sr_enter_plus_exit_z8_time_us = 50.0,/*changed from 560.0*/
+       .sr_exit_time_us = 14.0,
+       .sr_enter_plus_exit_time_us = 16.0,
+       .sr_exit_z8_time_us = 525.0,
+       .sr_enter_plus_exit_z8_time_us = 715.0,
        .fclk_change_latency_us = 20.0,
        .usr_retraining_latency_us = 2,
        .writeback_latency_us = 12.0,