iommu/arm-smmu-v3: Do not allow a SVA domain to be set on the wrong PASID
authorJason Gunthorpe <jgg@nvidia.com>
Wed, 27 Mar 2024 18:07:49 +0000 (15:07 -0300)
committerWill Deacon <will@kernel.org>
Tue, 9 Apr 2024 11:38:32 +0000 (12:38 +0100)
The SVA code is wired to assume that the SVA is programmed onto the
mm->pasid. The current core code always does this, so it is fine.

Add a check for clarity.

Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Tested-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/3-v6-228e7adf25eb+4155-smmuv3_newapi_p2_jgg@nvidia.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c

index 2cd433a9c8a0fa0d91262bdedb24268a3aaf0f3c..41b44baef15e807f7be5d3f90510425635125a8a 100644 (file)
@@ -569,6 +569,9 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain,
        int ret = 0;
        struct mm_struct *mm = domain->mm;
 
+       if (mm_get_enqcmd_pasid(mm) != id)
+               return -EINVAL;
+
        mutex_lock(&sva_lock);
        ret = __arm_smmu_sva_bind(dev, id, mm);
        mutex_unlock(&sva_lock);