dt-bindings: iio: adc: mcp320x: Update for mcp3550/1/3
authorLukas Wunner <lukas@wunner.de>
Sat, 9 Sep 2017 18:32:41 +0000 (20:32 +0200)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Sun, 24 Sep 2017 15:28:50 +0000 (16:28 +0100)
All chips supported by this driver clock data out on the falling edge
and latch data in on the rising edge, hence SPI mode (0,0) or (1,1)
must be used.

Furthermore, none of the chips has an internal reference voltage
regulator, so an external supply is always required and needs to be
specified in the device tree lest the IIO "scale" in sysfs cannot be
calculated.

Document these requirements in the device tree binding, add compatible
strings for the newly supported mcp3550/1/3 and explain that SPI mode
(0,0) should be preferred for these chips.

Cc: Mathias Duckeck <m.duckeck@kunbus.de>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Documentation/devicetree/bindings/iio/adc/mcp320x.txt

index bcd3ac8e6e0c57414b26aa60c91e543260208cdc..7d64753df94930b0469ade79168af8c32b1d3370 100644 (file)
@@ -29,15 +29,29 @@ Required properties:
                                "microchip,mcp3204"
                                "microchip,mcp3208"
                                "microchip,mcp3301"
+                               "microchip,mcp3550-50"
+                               "microchip,mcp3550-60"
+                               "microchip,mcp3551"
+                               "microchip,mcp3553"
 
                        NOTE: The use of the compatibles with no vendor prefix
                        is deprecated and only listed because old DT use them.
 
+       - spi-cpha, spi-cpol (boolean):
+                       Either SPI mode (0,0) or (1,1) must be used, so specify
+                       none or both of spi-cpha, spi-cpol.  The MCP3550/1/3
+                       is more efficient in mode (1,1) as only 3 instead of
+                       4 bytes need to be read from the ADC, but not all SPI
+                       masters support it.
+
+       - vref-supply:  Phandle to the external reference voltage supply.
+
 Examples:
 spi_controller {
        mcp3x0x@0 {
                compatible = "mcp3002";
                reg = <0>;
                spi-max-frequency = <1000000>;
+               vref-supply = <&vref_reg>;
        };
 };