MIPS: Loongson64: Load built-in dtbs
authorJiaxun Yang <jiaxun.yang@flygoat.com>
Wed, 25 Mar 2020 03:55:03 +0000 (11:55 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Wed, 25 Mar 2020 15:07:12 +0000 (16:07 +0100)
Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/mach-loongson64/builtin_dtbs.h [new file with mode: 0644]
arch/mips/include/asm/mach-loongson64/loongson.h
arch/mips/loongson64/env.c
arch/mips/loongson64/setup.c

diff --git a/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h b/arch/mips/include/asm/mach-loongson64/builtin_dtbs.h
new file mode 100644 (file)
index 0000000..853c6d8
--- /dev/null
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (C) 2019 Jiaxun Yang <jiaxun.yang@flygoat.com>
+ *
+ * Built-in Generic dtbs for MACH_LOONGSON64
+ */
+
+#ifndef __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
+#define __ASM_MACH_LOONGSON64_BUILTIN_DTBS_H_
+
+extern u32 __dtb_loongson3_4core_rs780e_begin[];
+extern u32 __dtb_loongson3_8core_rs780e_begin[];
+#endif
index a8fce112a9b00e9d438a654eb4cec7fa2eab74ab..fde1b75c45ea056bac5cb4dd973507619f6107f7 100644 (file)
@@ -25,6 +25,7 @@ extern const struct plat_smp_ops loongson3_smp_ops;
 /* loongson-specific command line, env and memory initialization */
 extern void __init prom_init_memory(void);
 extern void __init prom_init_env(void);
+extern void *loongson_fdt_blob;
 
 /* irq operation functions */
 extern void mach_irq_dispatch(unsigned int pending);
index 0daeb7bcf023860ce653fa945cdca284b638c43d..2554ef11170d31277534446f59f558de0c4d0fc7 100644 (file)
@@ -17,6 +17,7 @@
 #include <asm/bootinfo.h>
 #include <loongson.h>
 #include <boot_param.h>
+#include <builtin_dtbs.h>
 #include <workarounds.h>
 
 u32 cpu_clock_freq;
@@ -120,6 +121,28 @@ void __init prom_init_env(void)
                loongson_sysconf.cores_per_node - 1) /
                loongson_sysconf.cores_per_node;
 
+       if ((read_c0_prid() & PRID_IMP_MASK) == PRID_IMP_LOONGSON_64C) {
+               switch (read_c0_prid() & PRID_REV_MASK) {
+               case PRID_REV_LOONGSON3A_R1:
+               case PRID_REV_LOONGSON3A_R2_0:
+               case PRID_REV_LOONGSON3A_R2_1:
+               case PRID_REV_LOONGSON3A_R3_0:
+               case PRID_REV_LOONGSON3A_R3_1:
+                       loongson_fdt_blob = __dtb_loongson3_4core_rs780e_begin;
+                       break;
+               case PRID_REV_LOONGSON3B_R1:
+               case PRID_REV_LOONGSON3B_R2:
+                       loongson_fdt_blob = __dtb_loongson3_8core_rs780e_begin;
+                       break;
+               default:
+                       break;
+               }
+       }
+
+
+       if (!loongson_fdt_blob)
+               pr_err("Failed to determine built-in Loongson64 dtb\n");
+
        loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
        loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
        loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
index 4fd27f4f90edb625d5d6e8f73c8c082bef57a3c2..6fe3ffffcaa6aec783fb2dd8801790038d1f3d1e 100644 (file)
@@ -8,9 +8,15 @@
 
 #include <asm/wbflush.h>
 #include <asm/bootinfo.h>
+#include <linux/libfdt.h>
+#include <linux/of_fdt.h>
+
+#include <asm/prom.h>
 
 #include <loongson.h>
 
+void *loongson_fdt_blob;
+
 static void wbflush_loongson(void)
 {
        asm(".set\tpush\n\t"
@@ -27,4 +33,14 @@ EXPORT_SYMBOL(__wbflush);
 
 void __init plat_mem_setup(void)
 {
+       if (loongson_fdt_blob)
+               __dt_setup_arch(loongson_fdt_blob);
+}
+
+void __init device_tree_init(void)
+{
+       if (!initial_boot_params)
+               return;
+
+       unflatten_and_copy_device_tree();
 }