arm64: dts: lg: Fix SP805 clocks

The SP805 DT binding requires two clocks to be specified, but the two
LG platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux (and U-Boot) SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200907121831.242281-6-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chanho Min <chanho.min@lge.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi
index 64f3b135068dca1504c015bcf2f868a67944ed22..587103eb9536c52243b446a152e5d0047c5bd8bc 100644 (file)
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -141,8 +141,8 @@
                        compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xfd200000 0x1000>;
                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>;
+                       clock-names = "wdog_clk", "apb_pclk";
                };
                uart0: serial@fe000000 {
                        compatible = "arm,pl011", "arm,primecell";

diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi
index ac23592ab0114c03642a48fad65881af0eccd08a..2cea5b18aac7bfd87a0250712a22fea92702113a 100644 (file)
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -141,8 +141,8 @@
                        compatible = "arm,sp805", "arm,primecell";
                        reg = <0x0 0xfd200000 0x1000>;
                        interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>;
+                       clock-names = "wdog_clk", "apb_pclk";
                };
                uart0: serial@fe000000 {
                        compatible = "arm,pl011", "arm,primecell";