drm/amd/display: change dram_clock_latency to 34us for dcn35
authorPaul Hsieh <paul.hsieh@amd.com>
Tue, 28 May 2024 06:36:00 +0000 (14:36 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Jun 2024 20:17:16 +0000 (16:17 -0400)
[Why & How]
Current DRAM setting would cause underflow on customer platform.
Modify dram_clock_change_latency_us from 11.72 to 34.0 us as per recommendation from HW team

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

index 60f251cf973b1b6509347e197a7604e6a4da83fb..beed7adbbd43e012386be00defd176f3ee32b1f9 100644 (file)
@@ -177,7 +177,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
        .urgent_latency_pixel_data_only_us = 4.0,
        .urgent_latency_pixel_mixed_with_vm_data_us = 4.0,
        .urgent_latency_vm_data_only_us = 4.0,
-       .dram_clock_change_latency_us = 11.72,
+       .dram_clock_change_latency_us = 34.0,
        .urgent_out_of_order_return_per_channel_pixel_only_bytes = 4096,
        .urgent_out_of_order_return_per_channel_pixel_and_vm_bytes = 4096,
        .urgent_out_of_order_return_per_channel_vm_only_bytes = 4096,