PCI: qcom: Disable ASPM L0s for X1E80100

Currently, the cfg_1_9_0 which is being used for X1E80100 doesn't disable
ASPM L0s. However, hardware team recommends to disable L0s as the PHY init
sequence is not tuned support L0s. Hence reuse cfg_sc8280xp for X1E80100.

Note that the config_sid() callback is not present in cfg_sc8280xp, don't
concern about this because config_sid() callback is originally a no-op
for X1E80100.

Fixes: 6d0c39324c5f ("PCI: qcom: Add X1E80100 PCIe support")
Link: https://lore.kernel.org/r/20241101030902.579789-5-quic_qianyu@quicinc.com
Signed-off-by: Qiang Yu <quic_qianyu@quicinc.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <stable@vger.kernel.org> # 6.9

diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
index 4448ca54bdda7fae50f5f9aa9039e12bf2b65503..dc102d8bd58c69b7da7ff1073cbf12de9e0b8896 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1856,7 +1856,7 @@ static const struct of_device_id qcom_pcie_match[] = {
        { .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 },
        { .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 },
        { .compatible = "qcom,pcie-sm8550", .data = &cfg_1_9_0 },
-       { .compatible = "qcom,pcie-x1e80100", .data = &cfg_1_9_0 },
+       { .compatible = "qcom,pcie-x1e80100", .data = &cfg_sc8280xp },
        { }
 };