drm/i915/fbc: Nuke bogus single pipe fbc1 restriction

Not sure where the single pipe only restriction came for fbc1.
Nothing I can see that would prevent this.

v2: Nuke no_fbc_on_multiple_pipes() too

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191127201222.16669-3-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 37760a3814020ce490e698454e3d97a8b53627a5..dbc487daec95cb08a4f64e9c55c4b455d77436f5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -17810,8 +17810,6 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
        }
 
        intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
-
-       intel_fbc_init_pipe_state(dev_priv);
 }
 
 void intel_display_resume(struct drm_device *dev)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index f139cd545515ded50a2c024a419f726a01e3022e..8fcd1ceaddc7a97b173f1c34d80c901b1fbaa818 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -50,11 +50,6 @@ static inline bool fbc_supported(struct drm_i915_private *dev_priv)
        return HAS_FBC(dev_priv);
 }
 
-static inline bool no_fbc_on_multiple_pipes(struct drm_i915_private *dev_priv)
-{
-       return INTEL_GEN(dev_priv) <= 3;
-}
-
 /*
  * In some platforms where the CRTC's x:0/y:0 coordinates doesn't match the
  * frontbuffer's x:0/y:0 coordinates we lie to the hardware about the plane's
@@ -419,25 +414,6 @@ static void intel_fbc_deactivate(struct drm_i915_private *dev_priv,
        fbc->no_fbc_reason = reason;
 }
 
-static bool multiple_pipes_ok(struct intel_crtc *crtc,
-                             const struct intel_plane_state *plane_state)
-{
-       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-       struct intel_fbc *fbc = &dev_priv->fbc;
-       enum pipe pipe = crtc->pipe;
-
-       /* Don't even bother tracking anything we don't need. */
-       if (!no_fbc_on_multiple_pipes(dev_priv))
-               return true;
-
-       if (plane_state->uapi.visible)
-               fbc->visible_pipes_mask |= (1 << pipe);
-       else
-               fbc->visible_pipes_mask &= ~(1 << pipe);
-
-       return (fbc->visible_pipes_mask & ~(1 << pipe)) != 0;
-}
-
 static int find_compression_threshold(struct drm_i915_private *dev_priv,
                                      struct drm_mm_node *node,
                                      int size,
@@ -867,18 +843,12 @@ void intel_fbc_pre_update(struct intel_crtc *crtc,
 
        mutex_lock(&fbc->lock);
 
-       if (!multiple_pipes_ok(crtc, plane_state)) {
-               reason = "more than one pipe active";
-               goto deactivate;
-       }
-
        if (!fbc->enabled || fbc->crtc != crtc)
                goto unlock;
 
        intel_fbc_update_state_cache(crtc, crtc_state, plane_state);
        fbc->flip_pending = true;
 
-deactivate:
        intel_fbc_deactivate(dev_priv, reason);
 unlock:
        mutex_unlock(&fbc->lock);
@@ -1244,28 +1214,6 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *dev_priv)
        schedule_work(&fbc->underrun_work);
 }
 
-/**
- * intel_fbc_init_pipe_state - initialize FBC's CRTC visibility tracking
- * @dev_priv: i915 device instance
- *
- * The FBC code needs to track CRTC visibility since the older platforms can't
- * have FBC enabled while multiple pipes are used. This function does the
- * initial setup at driver load to make sure FBC is matching the real hardware.
- */
-void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv)
-{
-       struct intel_crtc *crtc;
-
-       /* Don't even bother tracking anything if we don't need. */
-       if (!no_fbc_on_multiple_pipes(dev_priv))
-               return;
-
-       for_each_intel_crtc(&dev_priv->drm, crtc)
-               if (intel_crtc_active(crtc) &&
-                   crtc->base.primary->state->visible)
-                       dev_priv->fbc.visible_pipes_mask |= (1 << crtc->pipe);
-}
-
 /*
  * The DDX driver changes its behavior depending on the value it reads from
  * i915.enable_fbc, so sanitize it by translating the default value into either

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index f58b0b1e3c5c7cc8202a110d50376a0e3808901e..3e7905003e4eb101bdd664c4f9e80081b1c5593e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -24,7 +24,6 @@ void intel_fbc_pre_update(struct intel_crtc *crtc,
                          const struct intel_plane_state *plane_state);
 void intel_fbc_post_update(struct intel_crtc *crtc);
 void intel_fbc_init(struct drm_i915_private *dev_priv);
-void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv);
 void intel_fbc_enable(struct intel_crtc *crtc,
                      const struct intel_crtc_state *crtc_state,
                      const struct intel_plane_state *plane_state);

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bae97cd62cb99d98eec3f73a99e91057dc1e4574..d515a9d39e2e7f10694d40c28e8fb59d734eedf6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -366,7 +366,6 @@ struct intel_fbc {
        unsigned threshold;
        unsigned int possible_framebuffer_bits;
        unsigned int busy_bits;
-       unsigned int visible_pipes_mask;
        struct intel_crtc *crtc;
 
        struct drm_mm_node compressed_fb;