arm64: dts: ti: k3-am64-main: Add ADC nodes
authorVignesh Raghavendra <vigneshr@ti.com>
Thu, 18 Mar 2021 11:34:43 +0000 (17:04 +0530)
committerNishanth Menon <nm@ti.com>
Thu, 18 Mar 2021 13:51:55 +0000 (08:51 -0500)
AM64 SoC has a single ADC IP with 8 channels. Add DT node for the same.

Default usecase is to control ADC from non Linux core on the system on
AM642 GP EVM, therefore mark the node as reserved in k3-am642-evm.dts
file. ADC lines are not pinned out on AM642 SK board, therefore disable
the node in k3-am642-sk.dts file.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210318113443.20036-1-vigneshr@ti.com
arch/arm64/boot/dts/ti/k3-am64-main.dtsi
arch/arm64/boot/dts/ti/k3-am642-evm.dts
arch/arm64/boot/dts/ti/k3-am642-sk.dts

index 7e7997e3adff8f685eb9c7a38b3046ff1a7cb0b2..dc852f63d1a2f71ee353f44bfd8e535e3d72c36b 100644 (file)
                        dr_mode = "otg";
                };
        };
+
+       tscadc0: tscadc@28001000 {
+               compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
+               reg = <0x00 0x28001000 0x00 0x1000>;
+               interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+               power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 0 0>;
+               assigned-clocks = <&k3_clks 0 0>;
+               assigned-clock-parents = <&k3_clks 0 3>;
+               assigned-clock-rates = <60000000>;
+               clock-names = "adc_tsc_fck";
+
+               adc {
+                       #io-channel-cells = <1>;
+                       compatible = "ti,am654-adc", "ti,am3359-adc";
+               };
+       };
 };
index 1365e31642944f61cc1ba3a9d0336c1381777487..6331fd426157f964a8474d60860e3e9c730303b1 100644 (file)
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };
 };
+
+&tscadc0 {
+       /* ADC is reserved for R5 usage */
+       status = "reserved";
+};
index 397ed3b2e121e71efca6cc99a4107dffb61f5bf5..8f9b1078b7b5c5ef09b118b2297970475c4700ef 100644 (file)
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };
 };
+
+&tscadc0 {
+       status = "disabled";
+};