ASoC: nau8825: Add pre-charge actions for input
authorDavid Lin <CTLIN0@nuvoton.com>
Tue, 23 May 2023 08:33:04 +0000 (16:33 +0800)
committerMark Brown <broonie@kernel.org>
Tue, 23 May 2023 09:58:31 +0000 (10:58 +0100)
Adding pre-charge actions to make FEPGA power stable faster. It
improve the recording quality at the beginning. Thus, it is also
meaningfully to decrease the final adc delay time.

Signed-off-by: David Lin <CTLIN0@nuvoton.com>
Link: https://lore.kernel.org/r/20230523083303.98436-1-CTLIN0@nuvoton.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/nau8825.c
sound/soc/codecs/nau8825.h

index 775c8e0cb09e616f192b172d9e96be0135bed082..cc3e18207c424ff0c0ad21d992d09df098422ee0 100644 (file)
@@ -911,6 +911,32 @@ static bool nau8825_volatile_reg(struct device *dev, unsigned int reg)
        }
 }
 
+static int nau8825_fepga_event(struct snd_soc_dapm_widget *w,
+                              struct snd_kcontrol *kcontrol, int event)
+{
+       struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
+       struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
+
+       switch (event) {
+       case SND_SOC_DAPM_POST_PMU:
+               regmap_update_bits(nau8825->regmap, NAU8825_REG_FEPGA,
+                                  NAU8825_ACDC_CTRL_MASK,
+                                  NAU8825_ACDC_VREF_MICP | NAU8825_ACDC_VREF_MICN);
+               regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
+                                  NAU8825_DISCHRG_EN, NAU8825_DISCHRG_EN);
+               msleep(40);
+               regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
+                                  NAU8825_DISCHRG_EN, 0);
+               regmap_update_bits(nau8825->regmap, NAU8825_REG_FEPGA,
+                                  NAU8825_ACDC_CTRL_MASK, 0);
+               break;
+       default:
+               break;
+       }
+
+       return 0;
+}
+
 static int nau8825_adc_event(struct snd_soc_dapm_widget *w,
                struct snd_kcontrol *kcontrol, int event)
 {
@@ -1127,8 +1153,8 @@ static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = {
        SND_SOC_DAPM_INPUT("MIC"),
        SND_SOC_DAPM_MICBIAS("MICBIAS", NAU8825_REG_MIC_BIAS, 8, 0),
 
-       SND_SOC_DAPM_PGA("Frontend PGA", NAU8825_REG_POWER_UP_CONTROL, 14, 0,
-               NULL, 0),
+       SND_SOC_DAPM_PGA_E("Frontend PGA", NAU8825_REG_POWER_UP_CONTROL, 14, 0,
+                          NULL, 0, nau8825_fepga_event, SND_SOC_DAPM_POST_PMU),
 
        SND_SOC_DAPM_ADC_E("ADC", NULL, SND_SOC_NOPM, 0, 0,
                nau8825_adc_event, SND_SOC_DAPM_POST_PMU |
index 44b62bc3880f8c4abc7b308a65d1fbaaaca507eb..38ce052aed50dee9fbab4de77b6db94dde0f984f 100644 (file)
 /* BOOST (0x76) */
 #define NAU8825_PRECHARGE_DIS  (1 << 13)
 #define NAU8825_GLOBAL_BIAS_EN (1 << 12)
+#define NAU8825_DISCHRG_EN     (1 << 11)
 #define NAU8825_HP_BOOST_DIS           (1 << 9)
 #define NAU8825_HP_BOOST_G_DIS (1 << 8)
 #define NAU8825_SHORT_SHUTDOWN_EN      (1 << 6)
 
+/* FEPGA (0x77) */
+#define NAU8825_ACDC_CTRL_SFT          14
+#define NAU8825_ACDC_CTRL_MASK         (0x3 << NAU8825_ACDC_CTRL_SFT)
+#define NAU8825_ACDC_VREF_MICP         (0x1 << NAU8825_ACDC_CTRL_SFT)
+#define NAU8825_ACDC_VREF_MICN         (0x2 << NAU8825_ACDC_CTRL_SFT)
+
 /* POWER_UP_CONTROL (0x7f) */
 #define NAU8825_POWERUP_INTEGR_R       (1 << 5)
 #define NAU8825_POWERUP_INTEGR_L       (1 << 4)