net/mlx5: Unify QoS element type checks across NIC and E-Switch
authorCarolina Jubran <cjubran@nvidia.com>
Tue, 8 Oct 2024 18:32:21 +0000 (21:32 +0300)
committerPaolo Abeni <pabeni@redhat.com>
Thu, 10 Oct 2024 11:12:00 +0000 (13:12 +0200)
Refactor the QoS element type support check by introducing a new
function, mlx5_qos_element_type_supported(), which handles element type
validation for both NIC and E-Switch schedulers.

This change removes the redundant esw_qos_element_type_supported()
function and unifies the element type checks into a single
implementation.

Signed-off-by: Carolina Jubran <cjubran@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/mellanox/mlx5/core/esw/qos.c
drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h
drivers/net/ethernet/mellanox/mlx5/core/qos.c
drivers/net/ethernet/mellanox/mlx5/core/rl.c

index be9abeb6e4aa096f76dff1eab866ff4a62d9d6f3..ea68d86ea6ea883f03ab338f640f1e0efb43744e 100644 (file)
@@ -371,25 +371,6 @@ static int esw_qos_set_group_max_rate(struct mlx5_esw_rate_group *group,
        return err;
 }
 
-static bool esw_qos_element_type_supported(struct mlx5_core_dev *dev, int type)
-{
-       switch (type) {
-       case SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR:
-               return MLX5_CAP_QOS(dev, esw_element_type) &
-                      ELEMENT_TYPE_CAP_MASK_TSAR;
-       case SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT:
-               return MLX5_CAP_QOS(dev, esw_element_type) &
-                      ELEMENT_TYPE_CAP_MASK_VPORT;
-       case SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC:
-               return MLX5_CAP_QOS(dev, esw_element_type) &
-                      ELEMENT_TYPE_CAP_MASK_VPORT_TC;
-       case SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC:
-               return MLX5_CAP_QOS(dev, esw_element_type) &
-                      ELEMENT_TYPE_CAP_MASK_PARA_VPORT_TC;
-       }
-       return false;
-}
-
 static int esw_qos_vport_create_sched_element(struct mlx5_vport *vport,
                                              u32 max_rate, u32 bw_share)
 {
@@ -399,7 +380,9 @@ static int esw_qos_vport_create_sched_element(struct mlx5_vport *vport,
        void *attr;
        int err;
 
-       if (!esw_qos_element_type_supported(dev, SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT))
+       if (!mlx5_qos_element_type_supported(dev,
+                                            SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT,
+                                            SCHEDULING_HIERARCHY_E_SWITCH))
                return -EOPNOTSUPP;
 
        MLX5_SET(scheduling_context, sched_ctx, element_type,
@@ -616,7 +599,9 @@ static int esw_qos_create(struct mlx5_eswitch *esw, struct netlink_ext_ack *exta
        if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, esw_scheduling))
                return -EOPNOTSUPP;
 
-       if (!esw_qos_element_type_supported(dev, SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR) ||
+       if (!mlx5_qos_element_type_supported(dev,
+                                            SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR,
+                                            SCHEDULING_HIERARCHY_E_SWITCH) ||
            !(MLX5_CAP_QOS(dev, esw_tsar_type) & TSAR_TYPE_CAP_MASK_DWRR))
                return -EOPNOTSUPP;
 
index 62c770b0eaa83a3bd25bd925a5d2ab94f2ea6047..5bb62051adc2e0bd22c2659b6732cb4033ca1770 100644 (file)
@@ -224,6 +224,7 @@ void mlx5_sriov_disable(struct pci_dev *pdev, bool num_vf_change);
 int mlx5_core_sriov_set_msix_vec_count(struct pci_dev *vf, int msix_vec_count);
 int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id);
 int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id);
+bool mlx5_qos_element_type_supported(struct mlx5_core_dev *dev, int type, u8 hierarchy);
 int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
                                       void *context, u32 *element_id);
 int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
index db2bd3ad63ba36b5a3158f15c1932131fe8ed768..4d353da3eb7b0d2e326a59ab8c0a587f4d7a4716 100644 (file)
@@ -28,7 +28,9 @@ int mlx5_qos_create_leaf_node(struct mlx5_core_dev *mdev, u32 parent_id,
 {
        u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
 
-       if (!(MLX5_CAP_QOS(mdev, nic_element_type) & ELEMENT_TYPE_CAP_MASK_QUEUE_GROUP))
+       if (!mlx5_qos_element_type_supported(mdev,
+                                            SCHEDULING_CONTEXT_ELEMENT_TYPE_QUEUE_GROUP,
+                                            SCHEDULING_HIERARCHY_NIC))
                return -EOPNOTSUPP;
 
        MLX5_SET(scheduling_context, sched_ctx, parent_element_id, parent_id);
@@ -47,7 +49,9 @@ int mlx5_qos_create_inner_node(struct mlx5_core_dev *mdev, u32 parent_id,
        u32 sched_ctx[MLX5_ST_SZ_DW(scheduling_context)] = {0};
        void *attr;
 
-       if (!(MLX5_CAP_QOS(mdev, nic_element_type) & ELEMENT_TYPE_CAP_MASK_TSAR) ||
+       if (!mlx5_qos_element_type_supported(mdev,
+                                            SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR,
+                                            SCHEDULING_HIERARCHY_NIC) ||
            !(MLX5_CAP_QOS(mdev, nic_tsar_type) & TSAR_TYPE_CAP_MASK_DWRR))
                return -EOPNOTSUPP;
 
index 9f8b4005f4bd0587f6884188cd651dc35b11da95..efadd575fb35d63ead69cc8f869b7652b8b8d04c 100644 (file)
 #include <linux/mlx5/driver.h>
 #include "mlx5_core.h"
 
+bool mlx5_qos_element_type_supported(struct mlx5_core_dev *dev, int type, u8 hierarchy)
+{
+       int cap;
+
+       switch (hierarchy) {
+       case SCHEDULING_HIERARCHY_E_SWITCH:
+               cap = MLX5_CAP_QOS(dev, esw_element_type);
+               break;
+       case SCHEDULING_HIERARCHY_NIC:
+               cap = MLX5_CAP_QOS(dev, nic_element_type);
+               break;
+       default:
+               return false;
+       }
+
+       switch (type) {
+       case SCHEDULING_CONTEXT_ELEMENT_TYPE_TSAR:
+               return cap & ELEMENT_TYPE_CAP_MASK_TSAR;
+       case SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT:
+               return cap & ELEMENT_TYPE_CAP_MASK_VPORT;
+       case SCHEDULING_CONTEXT_ELEMENT_TYPE_VPORT_TC:
+               return cap & ELEMENT_TYPE_CAP_MASK_VPORT_TC;
+       case SCHEDULING_CONTEXT_ELEMENT_TYPE_PARA_VPORT_TC:
+               return cap & ELEMENT_TYPE_CAP_MASK_PARA_VPORT_TC;
+       case SCHEDULING_CONTEXT_ELEMENT_TYPE_QUEUE_GROUP:
+               return cap & ELEMENT_TYPE_CAP_MASK_QUEUE_GROUP;
+       }
+
+       return false;
+}
+
 /* Scheduling element fw management */
 int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
                                       void *ctx, u32 *element_id)