crypto: sun8i-ce - Add TRNG clock to the D1 variant
authorSamuel Holland <samuel@sholland.org>
Sat, 31 Dec 2022 22:01:44 +0000 (16:01 -0600)
committerHerbert Xu <herbert@gondor.apana.org.au>
Fri, 13 Jan 2023 08:39:04 +0000 (16:39 +0800)
At least the D1 variant requires a separate clock for the TRNG.
Without this clock enabled, reading from /dev/hwrng reports:

   sun8i-ce 3040000.crypto: DMA timeout for TRNG (tm=96) on flow 3

Experimentation shows that the necessary clock is the SoC's internal
RC oscillator. This makes sense, as noise from the oscillator can be
used as a source of entropy.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h

index 9f659469983544c96883c9af51bf7c205272a3cb..a6865ff4d400c493d0ce30433ce785ce0f945161 100644 (file)
@@ -118,6 +118,7 @@ static const struct ce_variant ce_d1_variant = {
                { "bus", 0, 200000000 },
                { "mod", 300000000, 0 },
                { "ram", 0, 400000000 },
+               { "trng", 0, 0 },
                },
        .esr = ESR_D1,
        .prng = CE_ALG_PRNG,
index 8177aaba443498463a5c7e9c40a4916b6bef1c06..27029fb77e293af37b023fa8d8bf3157a7bb018e 100644 (file)
 
 #define MAX_SG 8
 
-#define CE_MAX_CLOCKS 3
+#define CE_MAX_CLOCKS 4
 
 #define MAXFLOW 4