arm64: dts: imx8mp-phyboard-pollux: Enable USB support
authorTeresa Remmet <t.remmet@phytec.de>
Wed, 6 Sep 2023 10:08:54 +0000 (12:08 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 25 Sep 2023 01:35:33 +0000 (09:35 +0800)
Enable USB support for both interfaces in host mode.
USB1 is directly conncted to a type-A connector and USB2
is attached to a 4-Port USB Hub.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts

index 1750fadb64c32cf61fe910175d28fabd8e6072ad..494a40077d1674b9a3dc7eb3f1ea1696396ef04c 100644 (file)
                regulator-name = "can2-stby";
        };
 
+       reg_usb1_vbus: regulator-usb1-vbus {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usb1_vbus>;
+               gpio = <&gpio1 12 GPIO_ACTIVE_LOW>;
+               regulator-max-microvolt = <5000000>;
+               regulator-min-microvolt = <5000000>;
+               regulator-name = "usb1_host_vbus";
+       };
+
        reg_usdhc2_vmmc: regulator-usdhc2 {
                compatible = "regulator-fixed";
                pinctrl-names = "default";
        status = "okay";
 };
 
+/* USB1 Host mode Type-A */
+&usb3_phy0 {
+       vbus-supply = <&reg_usb1_vbus>;
+       status = "okay";
+};
+
+&usb3_0 {
+       status = "okay";
+};
+
+&usb_dwc3_0 {
+       dr_mode = "host";
+       status = "okay";
+};
+
+/* USB2 4-port USB3.0 HUB */
+&usb3_phy1 {
+       status = "okay";
+};
+
+&usb3_1 {
+       fsl,permanently-attached;
+       fsl,disable-port-power-control;
+       status = "okay";
+};
+
+&usb_dwc3_1 {
+       dr_mode = "host";
+       status = "okay";
+};
+
 /* SD-Card */
 &usdhc2 {
        assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
                >;
        };
 
+       pinctrl_usb1_vbus: usb1vbusgrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12     0x10
+               >;
+       };
+
        pinctrl_usdhc2_pins: usdhc2-gpiogrp {
                fsl,pins = <
                        MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12       0x1c4