S: Germany
N: Adrian Bunk
-E: bunk@stusta.de
P: 1024D/4F12B400 B29C E71E FE19 6755 5C8A 84D4 99FC EA98 4F12 B400
D: misc kernel hacking and testing
-S: Grasmeierstrasse 11
-S: 80805 Muenchen
-S: Germany
N: Ray Burr
E: ryb@nightmare.com
S: San Jose, California 95131
S: USA
+N: Adam Fritzler
+E: mid@zigamorph.net
+
N: Fernando Fuganti
E: fuganti@conectiva.com.br
E: fuganti@netbank.com.br
- request_firmware() hotplug interface info.
floppy.txt
- notes and driver options for the floppy disk driver.
-fujitsu/
+frv/
- Fujitsu FR-V Linux documentation.
gpio.txt
- overview of GPIO (General Purpose Input/Output) access conventions.
- a description of shared subtrees for namespaces.
smart-config.txt
- description of the Smart Config makefile feature.
-smp.txt
- - a few notes on symmetric multi-processing.
sony-laptop.txt
- Sony Notebook Control Driver (SNC) Readme.
sonypi.txt
[Sat Mar 2 10:32:33 PST 1996 KERNEL_BUG-HOWTO lm@sgi.com (Larry McVoy)]
-This is how to track down a bug if you know nothing about kernel hacking.
+This is how to track down a bug if you know nothing about kernel hacking.
It's a brute force approach but it works pretty well.
You need:
. Rebuild a revision that you believe works, install, and verify that.
. Do a binary search over the kernels to figure out which one
- introduced the bug. I.e., suppose 1.3.28 didn't have the bug, but
+ introduced the bug. I.e., suppose 1.3.28 didn't have the bug, but
you know that 1.3.69 does. Pick a kernel in the middle and build
that, like 1.3.50. Build & test; if it works, pick the mid point
between .50 and .69, else the mid point between .28 and .50.
. You'll narrow it down to the kernel that introduced the bug. You
- can probably do better than this but it gets tricky.
+ can probably do better than this but it gets tricky.
. Narrow it down to a subdirectory
directories:
Copy the non-working directory next to the working directory
- as "dir.63".
+ as "dir.63".
One directory at time, try moving the working directory to
- "dir.62" and mv dir.63 dir"time, try
+ "dir.62" and mv dir.63 dir"time, try
mv dir dir.62
mv dir.63 dir
find dir -name '*.[oa]' -print | xargs rm -f
And then rebuild and retest. Assuming that all related
- changes were contained in the sub directory, this should
- isolate the change to a directory.
+ changes were contained in the sub directory, this should
+ isolate the change to a directory.
Problems: changes in header files may have occurred; I've
- found in my case that they were self explanatory - you may
+ found in my case that they were self explanatory - you may
or may not want to give up when that happens.
. Narrow it down to a file
- You can apply the same technique to each file in the directory,
- hoping that the changes in that file are self contained.
-
+ hoping that the changes in that file are self contained.
+
. Narrow it down to a routine
- You can take the old file and the new file and manually create
that makes the difference.
Finally, you take all the info that you have, kernel revisions, bug
-description, the extent to which you have narrowed it down, and pass
+description, the extent to which you have narrowed it down, and pass
that off to whomever you believe is the maintainer of that section.
A post to linux.dev.kernel isn't such a bad idea if you've done some
work to narrow it down.
Exception: If your mailer is mangling patches then someone may ask
you to re-send them using MIME.
-
-WARNING: Some mailers like Mozilla send your messages with
----- message header ----
-Content-Type: text/plain; charset=us-ascii; format=flowed
----- message header ----
-The problem is that "format=flowed" makes some of the mailers
-on receiving side to replace TABs with spaces and do similar
-changes. Thus the patches from you can look corrupted.
-
-To fix this just make your mozilla defaults/pref/mailnews.js file to look like:
-pref("mailnews.send_plaintext_flowed", false); // RFC 2646=======
-pref("mailnews.display.disable_format_flowed_support", true);
-
-
+See Documentation/email-clients.txt for hints about configuring
+your e-mail client so that it sends your patches untouched.
8) E-mail size.
only needs occurs after the SMC IO write cycle. The routines that
implement this work-around make an additional concession which is to
disable interrupts during the IO sequence. Other hardware devices
-(the LogicPD CPLD) have registers in the same the physical memory
+(the LogicPD CPLD) have registers in the same physical memory
region as the SMC chip. An interrupt might allow an access to one of
those registers while SMC IO is being performed.
echo 'exec /sbin/modprobe "$@"' >> /tmp/modprobe
chmod a+x /tmp/modprobe
echo /tmp/modprobe > /proc/sys/kernel/modprobe
+
+Note that the above applies only when the *kernel* is requesting
+that the module be loaded -- it won't have any effect if that module
+is being loaded explicitly using "modprobe" from userspace.
Rather than have a group where some items behave differently than
others, configfs provides a method whereby one or many subgroups are
automatically created inside the parent at its creation. Thus,
-mkdir("parent) results in "parent", "parent/subgroup1", up through
+mkdir("parent") results in "parent", "parent/subgroup1", up through
"parent/subgroupN". Items of type 1 can now be created in
"parent/subgroup1", and items of type N can be created in
"parent/subgroupN".
Changes since 2.5.0:
----
+---
[recommended]
New helpers: sb_bread(), sb_getblk(), sb_find_get_block(), set_bh(),
(sb_find_get_block() replaces 2.4's get_hash_table())
----
+---
[recommended]
New methods: ->alloc_inode() and ->destroy_inode().
Use FOO_I(inode) instead of &inode->u.foo_inode_i;
-Add foo_alloc_inode() and foo_destory_inode() - the former should allocate
+Add foo_alloc_inode() and foo_destroy_inode() - the former should allocate
foo_inode_info and return the address of ->vfs_inode, the latter should free
FOO_I(inode) (see in-tree filesystems for examples).
priority priority level
nice nice level
num_threads number of threads
+ it_real_value (obsolete, always 0)
start_time time the process started after system boot
vsize virtual memory size
rss resident set memory size
with the new root (cd /newmount; mount --move . /; chroot .), attach
stdin/stdout/stderr to the new /dev/console, and exec the new init.
- Since this is a remarkably persnickity process (and involves deleting
+ Since this is a remarkably persnickety process (and involves deleting
commands before you can run them), the klibc package introduced a helper
program (utils/run_init.c) to do all this for you. Most other packages
(such as busybox) have named this command "switch_root".
In order for a user application to make use of relay files, the
host filesystem must be mounted. For example,
- mount -t debugfs debugfs /debug
+ mount -t debugfs debugfs /sys/kernel/debug
NOTE: the host filesystem doesn't need to be mounted for kernel
clients to create or use channels - it only needs to be
--- /dev/null
+ ================================
+ Fujitsu FR-V LINUX DOCUMENTATION
+ ================================
+
+This directory contains documentation for the Fujitsu FR-V CPU architecture
+port of Linux.
+
+The following documents are available:
+
+ (*) features.txt
+
+ A description of the basic features inherent in this architecture port.
+
+
+ (*) configuring.txt
+
+ A summary of the configuration options particular to this architecture.
+
+
+ (*) booting.txt
+
+ A description of how to boot the kernel image and a summary of the kernel
+ command line options.
+
+
+ (*) gdbstub.txt
+
+ A description of how to debug the kernel using GDB attached by serial
+ port, and a summary of the services available.
+
+
+ (*) mmu-layout.txt
+
+ A description of the virtual and physical memory layout used in the
+ MMU linux kernel, and the registers used to support it.
+
+
+ (*) gdbinit
+
+ An example .gdbinit file for use with GDB. It includes macros for viewing
+ MMU state on the FR451. See mmu-layout.txt for more information.
+
+
+ (*) clock.txt
+
+ A description of the CPU clock scaling interface.
+
+
+ (*) atomic-ops.txt
+
+ A description of how the FR-V kernel's atomic operations work.
--- /dev/null
+ =====================================
+ FUJITSU FR-V KERNEL ATOMIC OPERATIONS
+ =====================================
+
+On the FR-V CPUs, there is only one atomic Read-Modify-Write operation: the SWAP/SWAPI
+instruction. Unfortunately, this alone can't be used to implement the following operations:
+
+ (*) Atomic add to memory
+
+ (*) Atomic subtract from memory
+
+ (*) Atomic bit modification (set, clear or invert)
+
+ (*) Atomic compare and exchange
+
+On such CPUs, the standard way of emulating such operations in uniprocessor mode is to disable
+interrupts, but on the FR-V CPUs, modifying the PSR takes a lot of clock cycles, and it has to be
+done twice. This means the CPU runs for a relatively long time with interrupts disabled,
+potentially having a great effect on interrupt latency.
+
+
+=============
+NEW ALGORITHM
+=============
+
+To get around this, the following algorithm has been implemented. It operates in a way similar to
+the LL/SC instruction pairs supported on a number of platforms.
+
+ (*) The CCCR.CC3 register is reserved within the kernel to act as an atomic modify abort flag.
+
+ (*) In the exception prologues run on kernel->kernel entry, CCCR.CC3 is set to 0 (Undefined
+ state).
+
+ (*) All atomic operations can then be broken down into the following algorithm:
+
+ (1) Set ICC3.Z to true and set CC3 to True (ORCC/CKEQ/ORCR).
+
+ (2) Load the value currently in the memory to be modified into a register.
+
+ (3) Make changes to the value.
+
+ (4) If CC3 is still True, simultaneously and atomically (by VLIW packing):
+
+ (a) Store the modified value back to memory.
+
+ (b) Set ICC3.Z to false (CORCC on GR29 is sufficient for this - GR29 holds the current
+ task pointer in the kernel, and so is guaranteed to be non-zero).
+
+ (5) If ICC3.Z is still true, go back to step (1).
+
+This works in a non-SMP environment because any interrupt or other exception that happens between
+steps (1) and (4) will set CC3 to the Undefined, thus aborting the store in (4a), and causing the
+condition in ICC3 to remain with the Z flag set, thus causing step (5) to loop back to step (1).
+
+
+This algorithm suffers from two problems:
+
+ (1) The condition CCCR.CC3 is cleared unconditionally by an exception, irrespective of whether or
+ not any changes were made to the target memory location during that exception.
+
+ (2) The branch from step (5) back to step (1) may have to happen more than once until the store
+ manages to take place. In theory, this loop could cycle forever because there are too many
+ interrupts coming in, but it's unlikely.
+
+
+=======
+EXAMPLE
+=======
+
+Taking an example from include/asm-frv/atomic.h:
+
+ static inline int atomic_add_return(int i, atomic_t *v)
+ {
+ unsigned long val;
+
+ asm("0: \n"
+
+It starts by setting ICC3.Z to true for later use, and also transforming that into CC3 being in the
+True state.
+
+ " orcc gr0,gr0,gr0,icc3 \n" <-- (1)
+ " ckeq icc3,cc7 \n" <-- (1)
+
+Then it does the load. Note that the final phase of step (1) is done at the same time as the
+load. The VLIW packing ensures they are done simultaneously. The ".p" on the load must not be
+removed without swapping the order of these two instructions.
+
+ " ld.p %M0,%1 \n" <-- (2)
+ " orcr cc7,cc7,cc3 \n" <-- (1)
+
+Then the proposed modification is generated. Note that the old value can be retained if required
+(such as in test_and_set_bit()).
+
+ " add%I2 %1,%2,%1 \n" <-- (3)
+
+Then it attempts to store the value back, contingent on no exception having cleared CC3 since it
+was set to True.
+
+ " cst.p %1,%M0 ,cc3,#1 \n" <-- (4a)
+
+It simultaneously records the success or failure of the store in ICC3.Z.
+
+ " corcc gr29,gr29,gr0 ,cc3,#1 \n" <-- (4b)
+
+Such that the branch can then be taken if the operation was aborted.
+
+ " beq icc3,#0,0b \n" <-- (5)
+ : "+U"(v->counter), "=&r"(val)
+ : "NPr"(i)
+ : "memory", "cc7", "cc3", "icc3"
+ );
+
+ return val;
+ }
+
+
+=============
+CONFIGURATION
+=============
+
+The atomic ops implementation can be made inline or out-of-line by changing the
+CONFIG_FRV_OUTOFLINE_ATOMIC_OPS configuration variable. Making it out-of-line has a number of
+advantages:
+
+ - The resulting kernel image may be smaller
+ - Debugging is easier as atomic ops can just be stepped over and they can be breakpointed
+
+Keeping it inline also has a number of advantages:
+
+ - The resulting kernel may be Faster
+ - no out-of-line function calls need to be made
+ - the compiler doesn't have half its registers clobbered by making a call
+
+The out-of-line implementations live in arch/frv/lib/atomic-ops.S.
--- /dev/null
+ =========================
+ BOOTING FR-V LINUX KERNEL
+ =========================
+
+======================
+PROVIDING A FILESYSTEM
+======================
+
+First of all, a root filesystem must be made available. This can be done in
+one of two ways:
+
+ (1) NFS Export
+
+ A filesystem should be constructed in a directory on an NFS server that
+ the target board can reach. This directory should then be NFS exported
+ such that the target board can read and write into it as root.
+
+ (2) Flash Filesystem (JFFS2 Recommended)
+
+ In this case, the image must be stored or built up on flash before it
+ can be used. A complete image can be built using the mkfs.jffs2 or
+ similar program and then downloaded and stored into flash by RedBoot.
+
+
+========================
+LOADING THE KERNEL IMAGE
+========================
+
+The kernel will need to be loaded into RAM by RedBoot (or by some alternative
+boot loader) before it can be run. The kernel image (arch/frv/boot/Image) may
+be loaded in one of three ways:
+
+ (1) Load from Flash
+
+ This is the simplest. RedBoot can store an image in the flash (see the
+ RedBoot documentation) and then load it back into RAM. RedBoot keeps
+ track of the load address, entry point and size, so the command to do
+ this is simply:
+
+ fis load linux
+
+ The image is then ready to be executed.
+
+ (2) Load by TFTP
+
+ The following command will download a raw binary kernel image from the
+ default server (as negotiated by BOOTP) and store it into RAM:
+
+ load -b 0x00100000 -r /tftpboot/image.bin
+
+ The image is then ready to be executed.
+
+ (3) Load by Y-Modem
+
+ The following command will download a raw binary kernel image across the
+ serial port that RedBoot is currently using:
+
+ load -m ymodem -b 0x00100000 -r zImage
+
+ The serial client (such as minicom) must then be told to transmit the
+ program by Y-Modem.
+
+ When finished, the image will then be ready to be executed.
+
+
+==================
+BOOTING THE KERNEL
+==================
+
+Boot the image with the following RedBoot command:
+
+ exec -c "<CMDLINE>" 0x00100000
+
+For example:
+
+ exec -c "console=ttySM0,115200 ip=:::::dhcp root=/dev/mtdblock2 rw"
+
+This will start the kernel running. Note that if the GDB-stub is compiled in,
+then the kernel will immediately wait for GDB to connect over serial before
+doing anything else. See the section on kernel debugging with GDB.
+
+The kernel command line <CMDLINE> tells the kernel where its console is and
+how to find its root filesystem. This is made up of the following components,
+separated by spaces:
+
+ (*) console=ttyS<x>[,<baud>[<parity>[<bits>[<flow>]]]]
+
+ This specifies that the system console should output through on-chip
+ serial port <x> (which can be "0" or "1").
+
+ <baud> is a standard baud rate between 1200 and 115200 (default 9600).
+
+ <parity> is a parity setting of "N", "O", "E", "M" or "S" for None, Odd,
+ Even, Mark or Space. "None" is the default.
+
+ <stop> is "7" or "8" for the number of bits per character. "8" is the
+ default.
+
+ <flow> is "r" to use flow control (XCTS on serial port 2 only). The
+ default is to not use flow control.
+
+ For example:
+
+ console=ttyS0,115200
+
+ To use the first on-chip serial port at baud rate 115200, no parity, 8
+ bits, and no flow control.
+
+ (*) root=/dev/<xxxx>
+
+ This specifies the device upon which the root filesystem resides. For
+ example:
+
+ /dev/nfs NFS root filesystem
+ /dev/mtdblock3 Fourth RedBoot partition on the System Flash
+
+ (*) rw
+
+ Start with the root filesystem mounted Read/Write.
+
+ The remaining components are all optional:
+
+ (*) ip=<ip>::::<host>:<iface>:<cfg>
+
+ Configure the network interface. If <cfg> is "off" then <ip> should
+ specify the IP address for the network device <iface>. <host> provide
+ the hostname for the device.
+
+ If <cfg> is "bootp" or "dhcp", then all of these parameters will be
+ discovered by consulting a BOOTP or DHCP server.
+
+ For example, the following might be used:
+
+ ip=192.168.73.12::::frv:eth0:off
+
+ This sets the IP address on the VDK motherboard RTL8029 ethernet chipset
+ (eth0) to be 192.168.73.12, and sets the board's hostname to be "frv".
+
+ (*) nfsroot=<server>:<dir>[,v<vers>]
+
+ This is mandatory if "root=/dev/nfs" is given as an option. It tells the
+ kernel the IP address of the NFS server providing its root filesystem,
+ and the pathname on that server of the filesystem.
+
+ The NFS version to use can also be specified. v2 and v3 are supported by
+ Linux.
+
+ For example:
+
+ nfsroot=192.168.73.1:/nfsroot-frv
+
+ (*) profile=1
+
+ Turns on the kernel profiler (accessible through /proc/profile).
+
+ (*) console=gdb0
+
+ This can be used as an alternative to the "console=ttyS..." listed
+ above. I tells the kernel to pass the console output to GDB if the
+ gdbstub is compiled in to the kernel.
+
+ If this is used, then the gdbstub passes the text to GDB, which then
+ simply dumps it to its standard output.
+
+ (*) mem=<xxx>M
+
+ Normally the kernel will work out how much SDRAM it has by reading the
+ SDRAM controller registers. That can be overridden with this
+ option. This allows the kernel to be told that it has <xxx> megabytes of
+ memory available.
+
+ (*) init=<prog> [<arg> [<arg> [<arg> ...]]]
+
+ This tells the kernel what program to run initially. By default this is
+ /sbin/init, but /sbin/sash or /bin/sh are common alternatives.
+
+ (*) vdc=...
+
+ This option configures the MB93493 companion chip visual display
+ driver. Please see Documentation/frv/mb93493/vdc.txt for more
+ information.
--- /dev/null
+Clock scaling
+-------------
+
+The kernel supports scaling of CLCK.CMODE, CLCK.CM and CLKC.P0 clock
+registers. If built with CONFIG_PM and CONFIG_SYSCTL options enabled, four
+extra files will appear in the directory /proc/sys/pm/. Reading these files
+will show:
+
+ p0 -- current value of the P0 bit in CLKC register.
+ cm -- current value of the CM bits in CLKC register.
+ cmode -- current value of the CMODE bits in CLKC register.
+
+On all boards, the 'p0' file should also be writable, and either '1' or '0'
+can be rewritten, to set or clear the CLKC_P0 bit respectively, hence
+controlling whether the resource bus rate clock is halved.
+
+The 'cm' file should also be available on all boards. '0' can be written to it
+to shift the board into High-Speed mode (normal), and '1' can be written to
+shift the board into Medium-Speed mode. Selecting Low-Speed mode is not
+supported by this interface, even though some CPUs do support it.
+
+On the boards with FR405 CPU (i.e. CB60 and CB70), the 'cmode' file is also
+writable, allowing the CPU core speed (and other clock speeds) to be
+controlled from userspace.
+
+
+Determining current and possible settings
+-----------------------------------------
+
+The current state and the available masks can be found in /proc/cpuinfo. For
+example, on the CB70:
+
+ # cat /proc/cpuinfo
+ CPU-Series: fr400
+ CPU-Core: fr405, gr0-31, BE, CCCR
+ CPU: mb93405
+ MMU: Prot
+ FP-Media: fr0-31, Media
+ System: mb93091-cb70, mb93090-mb00
+ PM-Controls: cmode=0xd31f, cm=0x3, p0=0x3, suspend=0x9
+ PM-Status: cmode=3, cm=0, p0=0
+ Clock-In: 50.00 MHz
+ Clock-Core: 300.00 MHz
+ Clock-SDRAM: 100.00 MHz
+ Clock-CBus: 100.00 MHz
+ Clock-Res: 50.00 MHz
+ Clock-Ext: 50.00 MHz
+ Clock-DSU: 25.00 MHz
+ BogoMips: 300.00
+
+And on the PDK, the PM lines look like the following:
+
+ PM-Controls: cm=0x3, p0=0x3, suspend=0x9
+ PM-Status: cmode=9, cm=0, p0=0
+
+The PM-Controls line, if present, will indicate which /proc/sys/pm files can
+be set to what values. The specification values are bitmasks; so, for example,
+"suspend=0x9" indicates that 0 and 3 can be written validly to
+/proc/sys/pm/suspend.
+
+The PM-Controls line will only be present if CONFIG_PM is configured to Y.
+
+The PM-Status line indicates which clock controls are set to which value. If
+the file can be read, then the suspend value must be 0, and so that's not
+included.
--- /dev/null
+ =======================================
+ FUJITSU FR-V LINUX KERNEL CONFIGURATION
+ =======================================
+
+=====================
+CONFIGURATION OPTIONS
+=====================
+
+The most important setting is in the "MMU support options" tab (the first
+presented in the configuration tools available):
+
+ (*) "Kernel Type"
+
+ This options allows selection of normal, MMU-requiring linux, and uClinux
+ (which doesn't require an MMU and doesn't have inter-process protection).
+
+There are a number of settings in the "Processor type and features" section of
+the kernel configuration that need to be considered.
+
+ (*) "CPU"
+
+ The register and instruction sets at the core of the processor. This can
+ only be set to "FR40x/45x/55x" at the moment - but this permits usage of
+ the kernel with MB93091 CB10, CB11, CB30, CB41, CB60, CB70 and CB451
+ CPU boards, and with the MB93093 PDK board.
+
+ (*) "System"
+
+ This option allows a choice of basic system. This governs the peripherals
+ that are expected to be available.
+
+ (*) "Motherboard"
+
+ This specifies the type of motherboard being used, and the peripherals
+ upon it. Currently only "MB93090-MB00" can be set here.
+
+ (*) "Default cache-write mode"
+
+ This controls the initial data cache write management mode. By default
+ Write-Through is selected, but Write-Back (Copy-Back) can also be
+ selected. This can be changed dynamically once the kernel is running (see
+ features.txt).
+
+There are some architecture specific configuration options in the "General
+Setup" section of the kernel configuration too:
+
+ (*) "Reserve memory uncached for (PCI) DMA"
+
+ This requests that a uClinux kernel set aside some memory in an uncached
+ window for the use as consistent DMA memory (mainly for PCI). At least a
+ megabyte will be allocated in this way, possibly more. Any memory so
+ reserved will not be available for normal allocations.
+
+ (*) "Kernel support for ELF-FDPIC binaries"
+
+ This enables the binary-format driver for the new FDPIC ELF binaries that
+ this platform normally uses. These binaries are totally relocatable -
+ their separate sections can relocated independently, allowing them to be
+ shared on uClinux where possible. This should normally be enabled.
+
+ (*) "Kernel image protection"
+
+ This makes the protection register governing access to the core kernel
+ image prohibit access by userspace programs. This option is available on
+ uClinux only.
+
+There are also a number of settings in the "Kernel Hacking" section of the
+kernel configuration especially for debugging a kernel on this
+architecture. See the "gdbstub.txt" file for information about those.
+
+
+======================
+DEFAULT CONFIGURATIONS
+======================
+
+The kernel sources include a number of example default configurations:
+
+ (*) defconfig-mb93091
+
+ Default configuration for the MB93091-VDK with both CPU board and
+ MB93090-MB00 motherboard running uClinux.
+
+
+ (*) defconfig-mb93091-fb
+
+ Default configuration for the MB93091-VDK with CPU board,
+ MB93090-MB00 motherboard, and DAV board running uClinux.
+ Includes framebuffer driver.
+
+
+ (*) defconfig-mb93093
+
+ Default configuration for the MB93093-PDK board running uClinux.
+
+
+ (*) defconfig-cb70-standalone
+
+ Default configuration for the MB93091-VDK with only CB70 CPU board
+ running uClinux. This will use the CB70's DM9000 for network access.
+
+
+ (*) defconfig-mmu
+
+ Default configuration for the MB93091-VDK with both CB451 CPU board and
+ MB93090-MB00 motherboard running MMU linux.
+
+ (*) defconfig-mmu-audio
+
+ Default configuration for the MB93091-VDK with CB451 CPU board, DAV
+ board, and MB93090-MB00 motherboard running MMU linux. Includes
+ audio driver.
+
+ (*) defconfig-mmu-fb
+
+ Default configuration for the MB93091-VDK with CB451 CPU board, DAV
+ board, and MB93090-MB00 motherboard running MMU linux. Includes
+ framebuffer driver.
+
+ (*) defconfig-mmu-standalone
+
+ Default configuration for the MB93091-VDK with only CB451 CPU board
+ running MMU linux.
+
+
+
--- /dev/null
+ ===========================
+ FUJITSU FR-V LINUX FEATURES
+ ===========================
+
+This kernel port has a number of features of which the user should be aware:
+
+ (*) Linux and uClinux
+
+ The FR-V architecture port supports both normal MMU linux and uClinux out
+ of the same sources.
+
+
+ (*) CPU support
+
+ Support for the FR401, FR403, FR405, FR451 and FR555 CPUs should work with
+ the same uClinux kernel configuration.
+
+ In normal (MMU) Linux mode, only the FR451 CPU will work as that is the
+ only one with a suitably featured CPU.
+
+ The kernel is written and compiled with the assumption that only the
+ bottom 32 GR registers and no FR registers will be used by the kernel
+ itself, however all extra userspace registers will be saved on context
+ switch. Note that since most CPUs can't support lazy switching, no attempt
+ is made to do lazy register saving where that would be possible (FR555
+ only currently).
+
+
+ (*) Board support
+
+ The board on which the kernel will run can be configured on the "Processor
+ type and features" configuration tab.
+
+ Set the System to "MB93093-PDK" to boot from the MB93093 (FR403) PDK.
+
+ Set the System to "MB93091-VDK" to boot from the CB11, CB30, CB41, CB60,
+ CB70 or CB451 VDK boards. Set the Motherboard setting to "MB93090-MB00" to
+ boot with the standard ATA90590B VDK motherboard, and set it to "None" to
+ boot without any motherboard.
+
+
+ (*) Binary Formats
+
+ The only userspace binary format supported is FDPIC ELF. Normal ELF, FLAT
+ and AOUT binaries are not supported for this architecture.
+
+ FDPIC ELF supports shared library and program interpreter facilities.
+
+
+ (*) Scheduler Speed
+
+ The kernel scheduler runs at 100Hz irrespective of the clock speed on this
+ architecture. This value is set in asm/param.h (see the HZ macro defined
+ there).
+
+
+ (*) Normal (MMU) Linux Memory Layout.
+
+ See mmu-layout.txt in this directory for a description of the normal linux
+ memory layout
+
+ See include/asm-frv/mem-layout.h for constants pertaining to the memory
+ layout.
+
+ See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
+ controller configuration.
+
+
+ (*) uClinux Memory Layout
+
+ The memory layout used by the uClinux kernel is as follows:
+
+ 0x00000000 - 0x00000FFF Null pointer catch page
+ 0x20000000 - 0x200FFFFF CS2# [PDK] FPGA
+ 0xC0000000 - 0xCFFFFFFF SDRAM
+ 0xC0000000 Base of Linux kernel image
+ 0xE0000000 - 0xEFFFFFFF CS2# [VDK] SLBUS/PCI window
+ 0xF0000000 - 0xF0FFFFFF CS5# MB93493 CSC area (DAV daughter board)
+ 0xF1000000 - 0xF1FFFFFF CS7# [CB70/CB451] CPU-card PCMCIA port space
+ 0xFC000000 - 0xFC0FFFFF CS1# [VDK] MB86943 config space
+ 0xFC100000 - 0xFC1FFFFF CS6# [CB70/CB451] CPU-card DM9000 NIC space
+ 0xFC100000 - 0xFC1FFFFF CS6# [PDK] AX88796 NIC space
+ 0xFC200000 - 0xFC2FFFFF CS3# MB93493 CSR area (DAV daughter board)
+ 0xFD000000 - 0xFDFFFFFF CS4# [CB70/CB451] CPU-card extra flash space
+ 0xFE000000 - 0xFEFFFFFF Internal CPU peripherals
+ 0xFF000000 - 0xFF1FFFFF CS0# Flash 1
+ 0xFF200000 - 0xFF3FFFFF CS0# Flash 2
+ 0xFFC00000 - 0xFFC0001F CS0# [VDK] FPGA
+
+ The kernel reads the size of the SDRAM from the memory bus controller
+ registers by default.
+
+ The kernel initialisation code (1) adjusts the SDRAM base addresses to
+ move the SDRAM to desired address, (2) moves the kernel image down to the
+ bottom of SDRAM, (3) adjusts the bus controller registers to move I/O
+ windows, and (4) rearranges the protection registers to protect all of
+ this.
+
+ The reasons for doing this are: (1) the page at address 0 should be
+ inaccessible so that NULL pointer errors can be caught; and (2) the bottom
+ three quarters are left unoccupied so that an FR-V CPU with an MMU can use
+ it for virtual userspace mappings.
+
+ See include/asm-frv/mem-layout.h for constants pertaining to the memory
+ layout.
+
+ See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
+ controller configuration.
+
+
+ (*) uClinux Memory Protection
+
+ A DAMPR register is used to cover the entire region used for I/O
+ (0xE0000000 - 0xFFFFFFFF). This permits the kernel to make uncached
+ accesses to this region. Userspace is not permitted to access it.
+
+ The DAMPR/IAMPR protection registers not in use for any other purpose are
+ tiled over the top of the SDRAM such that:
+
+ (1) The core kernel image is covered by as small a tile as possible
+ granting only the kernel access to the underlying data, whilst
+ making sure no SDRAM is actually made unavailable by this approach.
+
+ (2) All other tiles are arranged to permit userspace access to the rest
+ of the SDRAM.
+
+ Barring point (1), there is nothing to protect kernel data against
+ userspace damage - but this is uClinux.
+
+
+ (*) Exceptions and Fixups
+
+ Since the FR40x and FR55x CPUs that do not have full MMUs generate
+ imprecise data error exceptions, there are currently no automatic fixup
+ services available in uClinux. This includes misaligned memory access
+ fixups.
+
+ Userspace EFAULT errors can be trapped by issuing a MEMBAR instruction and
+ forcing the fault to happen there.
+
+ On the FR451, however, data exceptions are mostly precise, and so
+ exception fixup handling is implemented as normal.
+
+
+ (*) Userspace Breakpoints
+
+ The ptrace() system call supports the following userspace debugging
+ features:
+
+ (1) Hardware assisted single step.
+
+ (2) Breakpoint via the FR-V "BREAK" instruction.
+
+ (3) Breakpoint via the FR-V "TIRA GR0, #1" instruction.
+
+ (4) Syscall entry/exit trap.
+
+ Each of the above generates a SIGTRAP.
+
+
+ (*) On-Chip Serial Ports
+
+ The FR-V on-chip serial ports are made available as ttyS0 and ttyS1. Note
+ that if the GDB stub is compiled in, ttyS1 will not actually be available
+ as it will be being used for the GDB stub.
+
+ These ports can be made by:
+
+ mknod /dev/ttyS0 c 4 64
+ mknod /dev/ttyS1 c 4 65
+
+
+ (*) Maskable Interrupts
+
+ Level 15 (Non-maskable) interrupts are dealt with by the GDB stub if
+ present, and cause a panic if not. If the GDB stub is present, ttyS1's
+ interrupts are rated at level 15.
+
+ All other interrupts are distributed over the set of available priorities
+ so that no IRQs are shared where possible. The arch interrupt handling
+ routines attempt to disentangle the various sources available through the
+ CPU's own multiplexor, and those on off-CPU peripherals.
+
+
+ (*) Accessing PCI Devices
+
+ Where PCI is available, care must be taken when dealing with drivers that
+ access PCI devices. PCI devices present their data in little-endian form,
+ but the CPU sees it in big-endian form. The macros in asm/io.h try to get
+ this right, but may not under all circumstances...
+
+
+ (*) Ax88796 Ethernet Driver
+
+ The MB93093 PDK board has an Ax88796 ethernet chipset (an NE2000 clone). A
+ driver has been written to deal specifically with this. The driver
+ provides MII services for the card.
+
+ The driver can be configured by running make xconfig, and going to:
+
+ (*) Network device support
+ - turn on "Network device support"
+ (*) Ethernet (10 or 100Mbit)
+ - turn on "Ethernet (10 or 100Mbit)"
+ - turn on "AX88796 NE2000 compatible chipset"
+
+ The driver can be found in:
+
+ drivers/net/ax88796.c
+ include/asm/ax88796.h
+
+
+ (*) WorkRAM Driver
+
+ This driver provides a character device that permits access to the WorkRAM
+ that can be found on the FR451 CPU. Each page is accessible through a
+ separate minor number, thereby permitting each page to have its own
+ filesystem permissions set on the device file.
+
+ The device files should be:
+
+ mknod /dev/frv/workram0 c 240 0
+ mknod /dev/frv/workram1 c 240 1
+ mknod /dev/frv/workram2 c 240 2
+ ...
+
+ The driver will not permit the opening of any device file that does not
+ correspond to at least a partial page of WorkRAM. So the first device file
+ is the only one available on the FR451. If any other CPU is detected, none
+ of the devices will be openable.
+
+ The devices can be accessed with read, write and llseek, and can also be
+ mmapped. If they're mmapped, they will only map at the appropriate
+ 0x7e8nnnnn address on linux and at the 0xfe8nnnnn address on uClinux. If
+ MAP_FIXED is not specified, the appropriate address will be chosen anyway.
+
+ The mappings must be MAP_SHARED not MAP_PRIVATE, and must not be
+ PROT_EXEC. They must also start at file offset 0, and must not be longer
+ than one page in size.
+
+ This driver can be configured by running make xconfig, and going to:
+
+ (*) Character devices
+ - turn on "Fujitsu FR-V CPU WorkRAM support"
+
+
+ (*) Dynamic data cache write mode changing
+
+ It is possible to view and to change the data cache's write mode through
+ the /proc/sys/frv/cache-mode file while the kernel is running. There are
+ two modes available:
+
+ NAME MEANING
+ ===== ==========================================
+ wthru Data cache is in Write-Through mode
+ wback Data cache is in Write-Back/Copy-Back mode
+
+ To read the cache mode:
+
+ # cat /proc/sys/frv/cache-mode
+ wthru
+
+ To change the cache mode:
+
+ # echo wback >/proc/sys/frv/cache-mode
+ # cat /proc/sys/frv/cache-mode
+ wback
+
+
+ (*) MMU Context IDs and Pinning
+
+ On MMU Linux the CPU supports the concept of a context ID in its MMU to
+ make it more efficient (TLB entries are labelled with a context ID to link
+ them to specific tasks).
+
+ Normally once a context ID is allocated, it will remain affixed to a task
+ or CLONE_VM'd group of tasks for as long as it exists. However, since the
+ kernel is capable of supporting more tasks than there are possible ID
+ numbers, the kernel will pass context IDs from one task to another if
+ there are insufficient available.
+
+ The context ID currently in use by a task can be viewed in /proc:
+
+ # grep CXNR /proc/1/status
+ CXNR: 1
+
+ Note that kernel threads do not have a userspace context, and so will not
+ show a CXNR entry in that file.
+
+ Under some circumstances, however, it is desirable to pin a context ID on
+ a process such that the kernel won't pass it on. This can be done by
+ writing the process ID of the target process to a special file:
+
+ # echo 17 >/proc/sys/frv/pin-cxnr
+
+ Reading from the file will then show the context ID pinned.
+
+ # cat /proc/sys/frv/pin-cxnr
+ 4
+
+ The context ID will remain pinned as long as any process is using that
+ context, i.e.: when the all the subscribing processes have exited or
+ exec'd; or when an unpinning request happens:
+
+ # echo 0 >/proc/sys/frv/pin-cxnr
+
+ When there isn't a pinned context, the file shows -1:
+
+ # cat /proc/sys/frv/pin-cxnr
+ -1
--- /dev/null
+set remotebreak 1
+
+define _amr
+
+printf "AMRx DAMR IAMR \n"
+printf "==== ===================== =====================\n"
+printf "amr0 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x0].L,__debug_mmu.damr[0x0].P,__debug_mmu.iamr[0x0].L,__debug_mmu.iamr[0x0].P
+printf "amr1 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x1].L,__debug_mmu.damr[0x1].P,__debug_mmu.iamr[0x1].L,__debug_mmu.iamr[0x1].P
+printf "amr2 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x2].L,__debug_mmu.damr[0x2].P,__debug_mmu.iamr[0x2].L,__debug_mmu.iamr[0x2].P
+printf "amr3 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x3].L,__debug_mmu.damr[0x3].P,__debug_mmu.iamr[0x3].L,__debug_mmu.iamr[0x3].P
+printf "amr4 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x4].L,__debug_mmu.damr[0x4].P,__debug_mmu.iamr[0x4].L,__debug_mmu.iamr[0x4].P
+printf "amr5 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x5].L,__debug_mmu.damr[0x5].P,__debug_mmu.iamr[0x5].L,__debug_mmu.iamr[0x5].P
+printf "amr6 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x6].L,__debug_mmu.damr[0x6].P,__debug_mmu.iamr[0x6].L,__debug_mmu.iamr[0x6].P
+printf "amr7 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x7].L,__debug_mmu.damr[0x7].P,__debug_mmu.iamr[0x7].L,__debug_mmu.iamr[0x7].P
+
+printf "amr8 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x8].L,__debug_mmu.damr[0x8].P
+printf "amr9 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x9].L,__debug_mmu.damr[0x9].P
+printf "amr10: L:%08lx P:%08lx\n",__debug_mmu.damr[0xa].L,__debug_mmu.damr[0xa].P
+printf "amr11: L:%08lx P:%08lx\n",__debug_mmu.damr[0xb].L,__debug_mmu.damr[0xb].P
+
+end
+
+
+define _tlb
+printf "tlb[0x00]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x0].L,__debug_mmu.tlb[0x0].P,__debug_mmu.tlb[0x40+0x0].L,__debug_mmu.tlb[0x40+0x0].P
+printf "tlb[0x01]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1].L,__debug_mmu.tlb[0x1].P,__debug_mmu.tlb[0x40+0x1].L,__debug_mmu.tlb[0x40+0x1].P
+printf "tlb[0x02]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2].L,__debug_mmu.tlb[0x2].P,__debug_mmu.tlb[0x40+0x2].L,__debug_mmu.tlb[0x40+0x2].P
+printf "tlb[0x03]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3].L,__debug_mmu.tlb[0x3].P,__debug_mmu.tlb[0x40+0x3].L,__debug_mmu.tlb[0x40+0x3].P
+printf "tlb[0x04]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x4].L,__debug_mmu.tlb[0x4].P,__debug_mmu.tlb[0x40+0x4].L,__debug_mmu.tlb[0x40+0x4].P
+printf "tlb[0x05]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x5].L,__debug_mmu.tlb[0x5].P,__debug_mmu.tlb[0x40+0x5].L,__debug_mmu.tlb[0x40+0x5].P
+printf "tlb[0x06]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x6].L,__debug_mmu.tlb[0x6].P,__debug_mmu.tlb[0x40+0x6].L,__debug_mmu.tlb[0x40+0x6].P
+printf "tlb[0x07]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x7].L,__debug_mmu.tlb[0x7].P,__debug_mmu.tlb[0x40+0x7].L,__debug_mmu.tlb[0x40+0x7].P
+printf "tlb[0x08]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x8].L,__debug_mmu.tlb[0x8].P,__debug_mmu.tlb[0x40+0x8].L,__debug_mmu.tlb[0x40+0x8].P
+printf "tlb[0x09]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x9].L,__debug_mmu.tlb[0x9].P,__debug_mmu.tlb[0x40+0x9].L,__debug_mmu.tlb[0x40+0x9].P
+printf "tlb[0x0a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xa].L,__debug_mmu.tlb[0xa].P,__debug_mmu.tlb[0x40+0xa].L,__debug_mmu.tlb[0x40+0xa].P
+printf "tlb[0x0b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xb].L,__debug_mmu.tlb[0xb].P,__debug_mmu.tlb[0x40+0xb].L,__debug_mmu.tlb[0x40+0xb].P
+printf "tlb[0x0c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xc].L,__debug_mmu.tlb[0xc].P,__debug_mmu.tlb[0x40+0xc].L,__debug_mmu.tlb[0x40+0xc].P
+printf "tlb[0x0d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xd].L,__debug_mmu.tlb[0xd].P,__debug_mmu.tlb[0x40+0xd].L,__debug_mmu.tlb[0x40+0xd].P
+printf "tlb[0x0e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xe].L,__debug_mmu.tlb[0xe].P,__debug_mmu.tlb[0x40+0xe].L,__debug_mmu.tlb[0x40+0xe].P
+printf "tlb[0x0f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xf].L,__debug_mmu.tlb[0xf].P,__debug_mmu.tlb[0x40+0xf].L,__debug_mmu.tlb[0x40+0xf].P
+printf "tlb[0x10]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x10].L,__debug_mmu.tlb[0x10].P,__debug_mmu.tlb[0x40+0x10].L,__debug_mmu.tlb[0x40+0x10].P
+printf "tlb[0x11]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x11].L,__debug_mmu.tlb[0x11].P,__debug_mmu.tlb[0x40+0x11].L,__debug_mmu.tlb[0x40+0x11].P
+printf "tlb[0x12]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x12].L,__debug_mmu.tlb[0x12].P,__debug_mmu.tlb[0x40+0x12].L,__debug_mmu.tlb[0x40+0x12].P
+printf "tlb[0x13]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x13].L,__debug_mmu.tlb[0x13].P,__debug_mmu.tlb[0x40+0x13].L,__debug_mmu.tlb[0x40+0x13].P
+printf "tlb[0x14]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x14].L,__debug_mmu.tlb[0x14].P,__debug_mmu.tlb[0x40+0x14].L,__debug_mmu.tlb[0x40+0x14].P
+printf "tlb[0x15]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x15].L,__debug_mmu.tlb[0x15].P,__debug_mmu.tlb[0x40+0x15].L,__debug_mmu.tlb[0x40+0x15].P
+printf "tlb[0x16]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x16].L,__debug_mmu.tlb[0x16].P,__debug_mmu.tlb[0x40+0x16].L,__debug_mmu.tlb[0x40+0x16].P
+printf "tlb[0x17]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x17].L,__debug_mmu.tlb[0x17].P,__debug_mmu.tlb[0x40+0x17].L,__debug_mmu.tlb[0x40+0x17].P
+printf "tlb[0x18]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x18].L,__debug_mmu.tlb[0x18].P,__debug_mmu.tlb[0x40+0x18].L,__debug_mmu.tlb[0x40+0x18].P
+printf "tlb[0x19]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x19].L,__debug_mmu.tlb[0x19].P,__debug_mmu.tlb[0x40+0x19].L,__debug_mmu.tlb[0x40+0x19].P
+printf "tlb[0x1a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1a].L,__debug_mmu.tlb[0x1a].P,__debug_mmu.tlb[0x40+0x1a].L,__debug_mmu.tlb[0x40+0x1a].P
+printf "tlb[0x1b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1b].L,__debug_mmu.tlb[0x1b].P,__debug_mmu.tlb[0x40+0x1b].L,__debug_mmu.tlb[0x40+0x1b].P
+printf "tlb[0x1c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1c].L,__debug_mmu.tlb[0x1c].P,__debug_mmu.tlb[0x40+0x1c].L,__debug_mmu.tlb[0x40+0x1c].P
+printf "tlb[0x1d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1d].L,__debug_mmu.tlb[0x1d].P,__debug_mmu.tlb[0x40+0x1d].L,__debug_mmu.tlb[0x40+0x1d].P
+printf "tlb[0x1e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1e].L,__debug_mmu.tlb[0x1e].P,__debug_mmu.tlb[0x40+0x1e].L,__debug_mmu.tlb[0x40+0x1e].P
+printf "tlb[0x1f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1f].L,__debug_mmu.tlb[0x1f].P,__debug_mmu.tlb[0x40+0x1f].L,__debug_mmu.tlb[0x40+0x1f].P
+printf "tlb[0x20]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x20].L,__debug_mmu.tlb[0x20].P,__debug_mmu.tlb[0x40+0x20].L,__debug_mmu.tlb[0x40+0x20].P
+printf "tlb[0x21]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x21].L,__debug_mmu.tlb[0x21].P,__debug_mmu.tlb[0x40+0x21].L,__debug_mmu.tlb[0x40+0x21].P
+printf "tlb[0x22]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x22].L,__debug_mmu.tlb[0x22].P,__debug_mmu.tlb[0x40+0x22].L,__debug_mmu.tlb[0x40+0x22].P
+printf "tlb[0x23]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x23].L,__debug_mmu.tlb[0x23].P,__debug_mmu.tlb[0x40+0x23].L,__debug_mmu.tlb[0x40+0x23].P
+printf "tlb[0x24]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x24].L,__debug_mmu.tlb[0x24].P,__debug_mmu.tlb[0x40+0x24].L,__debug_mmu.tlb[0x40+0x24].P
+printf "tlb[0x25]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x25].L,__debug_mmu.tlb[0x25].P,__debug_mmu.tlb[0x40+0x25].L,__debug_mmu.tlb[0x40+0x25].P
+printf "tlb[0x26]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x26].L,__debug_mmu.tlb[0x26].P,__debug_mmu.tlb[0x40+0x26].L,__debug_mmu.tlb[0x40+0x26].P
+printf "tlb[0x27]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x27].L,__debug_mmu.tlb[0x27].P,__debug_mmu.tlb[0x40+0x27].L,__debug_mmu.tlb[0x40+0x27].P
+printf "tlb[0x28]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x28].L,__debug_mmu.tlb[0x28].P,__debug_mmu.tlb[0x40+0x28].L,__debug_mmu.tlb[0x40+0x28].P
+printf "tlb[0x29]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x29].L,__debug_mmu.tlb[0x29].P,__debug_mmu.tlb[0x40+0x29].L,__debug_mmu.tlb[0x40+0x29].P
+printf "tlb[0x2a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2a].L,__debug_mmu.tlb[0x2a].P,__debug_mmu.tlb[0x40+0x2a].L,__debug_mmu.tlb[0x40+0x2a].P
+printf "tlb[0x2b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2b].L,__debug_mmu.tlb[0x2b].P,__debug_mmu.tlb[0x40+0x2b].L,__debug_mmu.tlb[0x40+0x2b].P
+printf "tlb[0x2c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2c].L,__debug_mmu.tlb[0x2c].P,__debug_mmu.tlb[0x40+0x2c].L,__debug_mmu.tlb[0x40+0x2c].P
+printf "tlb[0x2d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2d].L,__debug_mmu.tlb[0x2d].P,__debug_mmu.tlb[0x40+0x2d].L,__debug_mmu.tlb[0x40+0x2d].P
+printf "tlb[0x2e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2e].L,__debug_mmu.tlb[0x2e].P,__debug_mmu.tlb[0x40+0x2e].L,__debug_mmu.tlb[0x40+0x2e].P
+printf "tlb[0x2f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2f].L,__debug_mmu.tlb[0x2f].P,__debug_mmu.tlb[0x40+0x2f].L,__debug_mmu.tlb[0x40+0x2f].P
+printf "tlb[0x30]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x30].L,__debug_mmu.tlb[0x30].P,__debug_mmu.tlb[0x40+0x30].L,__debug_mmu.tlb[0x40+0x30].P
+printf "tlb[0x31]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x31].L,__debug_mmu.tlb[0x31].P,__debug_mmu.tlb[0x40+0x31].L,__debug_mmu.tlb[0x40+0x31].P
+printf "tlb[0x32]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x32].L,__debug_mmu.tlb[0x32].P,__debug_mmu.tlb[0x40+0x32].L,__debug_mmu.tlb[0x40+0x32].P
+printf "tlb[0x33]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x33].L,__debug_mmu.tlb[0x33].P,__debug_mmu.tlb[0x40+0x33].L,__debug_mmu.tlb[0x40+0x33].P
+printf "tlb[0x34]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x34].L,__debug_mmu.tlb[0x34].P,__debug_mmu.tlb[0x40+0x34].L,__debug_mmu.tlb[0x40+0x34].P
+printf "tlb[0x35]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x35].L,__debug_mmu.tlb[0x35].P,__debug_mmu.tlb[0x40+0x35].L,__debug_mmu.tlb[0x40+0x35].P
+printf "tlb[0x36]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x36].L,__debug_mmu.tlb[0x36].P,__debug_mmu.tlb[0x40+0x36].L,__debug_mmu.tlb[0x40+0x36].P
+printf "tlb[0x37]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x37].L,__debug_mmu.tlb[0x37].P,__debug_mmu.tlb[0x40+0x37].L,__debug_mmu.tlb[0x40+0x37].P
+printf "tlb[0x38]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x38].L,__debug_mmu.tlb[0x38].P,__debug_mmu.tlb[0x40+0x38].L,__debug_mmu.tlb[0x40+0x38].P
+printf "tlb[0x39]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x39].L,__debug_mmu.tlb[0x39].P,__debug_mmu.tlb[0x40+0x39].L,__debug_mmu.tlb[0x40+0x39].P
+printf "tlb[0x3a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3a].L,__debug_mmu.tlb[0x3a].P,__debug_mmu.tlb[0x40+0x3a].L,__debug_mmu.tlb[0x40+0x3a].P
+printf "tlb[0x3b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3b].L,__debug_mmu.tlb[0x3b].P,__debug_mmu.tlb[0x40+0x3b].L,__debug_mmu.tlb[0x40+0x3b].P
+printf "tlb[0x3c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3c].L,__debug_mmu.tlb[0x3c].P,__debug_mmu.tlb[0x40+0x3c].L,__debug_mmu.tlb[0x40+0x3c].P
+printf "tlb[0x3d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3d].L,__debug_mmu.tlb[0x3d].P,__debug_mmu.tlb[0x40+0x3d].L,__debug_mmu.tlb[0x40+0x3d].P
+printf "tlb[0x3e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3e].L,__debug_mmu.tlb[0x3e].P,__debug_mmu.tlb[0x40+0x3e].L,__debug_mmu.tlb[0x40+0x3e].P
+printf "tlb[0x3f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3f].L,__debug_mmu.tlb[0x3f].P,__debug_mmu.tlb[0x40+0x3f].L,__debug_mmu.tlb[0x40+0x3f].P
+end
+
+
+define _pgd
+p (pgd_t[0x40])*(pgd_t*)(__debug_mmu.damr[0x3].L)
+end
+
+define _ptd_i
+p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x4].L)
+end
+
+define _ptd_d
+p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x5].L)
+end
--- /dev/null
+ ====================
+ DEBUGGING FR-V LINUX
+ ====================
+
+
+The kernel contains a GDB stub that talks GDB remote protocol across a serial
+port. This permits GDB to single step through the kernel, set breakpoints and
+trap exceptions that happen in kernel space and interrupt execution. It also
+permits the NMI interrupt button or serial port events to jump the kernel into
+the debugger.
+
+On the CPUs that have on-chip UARTs (FR400, FR403, FR405, FR555), the
+GDB stub hijacks a serial port for its own purposes, and makes it
+generate level 15 interrupts (NMI). The kernel proper cannot see the serial
+port in question under these conditions.
+
+On the MB93091-VDK CPU boards, the GDB stub uses UART1, which would otherwise
+be /dev/ttyS1. On the MB93093-PDK, the GDB stub uses UART0. Therefore, on the
+PDK there is no externally accessible serial port and the serial port to
+which the touch screen is attached becomes /dev/ttyS0.
+
+Note that the GDB stub runs entirely within CPU debug mode, and so should not
+incur any exceptions or interrupts whilst it is active. In particular, note
+that the clock will lose time since it is implemented in software.
+
+
+==================
+KERNEL PREPARATION
+==================
+
+Firstly, a debuggable kernel must be built. To do this, unpack the kernel tree
+and copy the configuration that you wish to use to .config. Then reconfigure
+the following things on the "Kernel Hacking" tab:
+
+ (*) "Include debugging information"
+
+ Set this to "Y". This causes all C and Assembly files to be compiled
+ to include debugging information.
+
+ (*) "In-kernel GDB stub"
+
+ Set this to "Y". This causes the GDB stub to be compiled into the
+ kernel.
+
+ (*) "Immediate activation"
+
+ Set this to "Y" if you want the GDB stub to activate as soon as possible
+ and wait for GDB to connect. This allows you to start tracing right from
+ the beginning of start_kernel() in init/main.c.
+
+ (*) "Console through GDB stub"
+
+ Set this to "Y" if you wish to be able to use "console=gdb0" on the
+ command line. That tells the kernel to pass system console messages to
+ GDB (which then prints them on its standard output). This is useful when
+ debugging the serial drivers that'd otherwise be used to pass console
+ messages to the outside world.
+
+Then build as usual, download to the board and execute. Note that if
+"Immediate activation" was selected, then the kernel will wait for GDB to
+attach. If not, then the kernel will boot immediately and GDB will have to
+interrupt it or wait for an exception to occur before doing anything with
+the kernel.
+
+
+=========================
+KERNEL DEBUGGING WITH GDB
+=========================
+
+Set the serial port on the computer that's going to run GDB to the appropriate
+baud rate. Assuming the board's debug port is connected to ttyS0/COM1 on the
+computer doing the debugging:
+
+ stty -F /dev/ttyS0 115200
+
+Then start GDB in the base of the kernel tree:
+
+ frv-uclinux-gdb linux [uClinux]
+
+Or:
+
+ frv-uclinux-gdb vmlinux [MMU linux]
+
+When the prompt appears:
+
+ GNU gdb frv-031024
+ Copyright 2003 Free Software Foundation, Inc.
+ GDB is free software, covered by the GNU General Public License, and you are
+ welcome to change it and/or distribute copies of it under certain conditions.
+ Type "show copying" to see the conditions.
+ There is absolutely no warranty for GDB. Type "show warranty" for details.
+ This GDB was configured as "--host=i686-pc-linux-gnu --target=frv-uclinux"...
+ (gdb)
+
+Attach to the board like this:
+
+ (gdb) target remote /dev/ttyS0
+ Remote debugging using /dev/ttyS0
+ start_kernel () at init/main.c:395
+ (gdb)
+
+This should show the appropriate lines from the source too. The kernel can
+then be debugged almost as if it's any other program.
+
+
+===============================
+INTERRUPTING THE RUNNING KERNEL
+===============================
+
+The kernel can be interrupted whilst it is running, causing a jump back to the
+GDB stub and the debugger:
+
+ (*) Pressing Ctrl-C in GDB. This will cause GDB to try and interrupt the
+ kernel by sending an RS232 BREAK over the serial line to the GDB
+ stub. This will (mostly) immediately interrupt the kernel and return it
+ to the debugger.
+
+ (*) Pressing the NMI button on the board will also cause a jump into the
+ debugger.
+
+ (*) Setting a software breakpoint. This sets a break instruction at the
+ desired location which the GDB stub then traps the exception for.
+
+ (*) Setting a hardware breakpoint. The GDB stub is capable of using the IBAR
+ and DBAR registers to assist debugging.
+
+Furthermore, the GDB stub will intercept a number of exceptions automatically
+if they are caused by kernel execution. It will also intercept BUG() macro
+invocation.
+
--- /dev/null
+ =================================
+ INTERNAL KERNEL ABI FOR FR-V ARCH
+ =================================
+
+The internal FRV kernel ABI is not quite the same as the userspace ABI. A
+number of the registers are used for special purposed, and the ABI is not
+consistent between modules vs core, and MMU vs no-MMU.
+
+This partly stems from the fact that FRV CPUs do not have a separate
+supervisor stack pointer, and most of them do not have any scratch
+registers, thus requiring at least one general purpose register to be
+clobbered in such an event. Also, within the kernel core, it is possible to
+simply jump or call directly between functions using a relative offset.
+This cannot be extended to modules for the displacement is likely to be too
+far. Thus in modules the address of a function to call must be calculated
+in a register and then used, requiring two extra instructions.
+
+This document has the following sections:
+
+ (*) System call register ABI
+ (*) CPU operating modes
+ (*) Internal kernel-mode register ABI
+ (*) Internal debug-mode register ABI
+ (*) Virtual interrupt handling
+
+
+========================
+SYSTEM CALL REGISTER ABI
+========================
+
+When a system call is made, the following registers are effective:
+
+ REGISTERS CALL RETURN
+ =============== ======================= =======================
+ GR7 System call number Preserved
+ GR8 Syscall arg #1 Return value
+ GR9-GR13 Syscall arg #2-6 Preserved
+
+
+===================
+CPU OPERATING MODES
+===================
+
+The FR-V CPU has three basic operating modes. In order of increasing
+capability:
+
+ (1) User mode.
+
+ Basic userspace running mode.
+
+ (2) Kernel mode.
+
+ Normal kernel mode. There are many additional control registers
+ available that may be accessed in this mode, in addition to all the
+ stuff available to user mode. This has two submodes:
+
+ (a) Exceptions enabled (PSR.T == 1).
+
+ Exceptions will invoke the appropriate normal kernel mode
+ handler. On entry to the handler, the PSR.T bit will be cleared.
+
+ (b) Exceptions disabled (PSR.T == 0).
+
+ No exceptions or interrupts may happen. Any mandatory exceptions
+ will cause the CPU to halt unless the CPU is told to jump into
+ debug mode instead.
+
+ (3) Debug mode.
+
+ No exceptions may happen in this mode. Memory protection and
+ management exceptions will be flagged for later consideration, but
+ the exception handler won't be invoked. Debugging traps such as
+ hardware breakpoints and watchpoints will be ignored. This mode is
+ entered only by debugging events obtained from the other two modes.
+
+ All kernel mode registers may be accessed, plus a few extra debugging
+ specific registers.
+
+
+=================================
+INTERNAL KERNEL-MODE REGISTER ABI
+=================================
+
+There are a number of permanent register assignments that are set up by
+entry.S in the exception prologue. Note that there is a complete set of
+exception prologues for each of user->kernel transition and kernel->kernel
+transition. There are also user->debug and kernel->debug mode transition
+prologues.
+
+
+ REGISTER FLAVOUR USE
+ =============== ======= ==============================================
+ GR1 Supervisor stack pointer
+ GR15 Current thread info pointer
+ GR16 GP-Rel base register for small data
+ GR28 Current exception frame pointer (__frame)
+ GR29 Current task pointer (current)
+ GR30 Destroyed by kernel mode entry
+ GR31 NOMMU Destroyed by debug mode entry
+ GR31 MMU Destroyed by TLB miss kernel mode entry
+ CCR.ICC2 Virtual interrupt disablement tracking
+ CCCR.CC3 Cleared by exception prologue
+ (atomic op emulation)
+ SCR0 MMU See mmu-layout.txt.
+ SCR1 MMU See mmu-layout.txt.
+ SCR2 MMU Save for EAR0 (destroyed by icache insns
+ in debug mode)
+ SCR3 MMU Save for GR31 during debug exceptions
+ DAMR/IAMR NOMMU Fixed memory protection layout.
+ DAMR/IAMR MMU See mmu-layout.txt.
+
+
+Certain registers are also used or modified across function calls:
+
+ REGISTER CALL RETURN
+ =============== =============================== ======================
+ GR0 Fixed Zero -
+ GR2 Function call frame pointer
+ GR3 Special Preserved
+ GR3-GR7 - Clobbered
+ GR8 Function call arg #1 Return value
+ (or clobbered)
+ GR9 Function call arg #2 Return value MSW
+ (or clobbered)
+ GR10-GR13 Function call arg #3-#6 Clobbered
+ GR14 - Clobbered
+ GR15-GR16 Special Preserved
+ GR17-GR27 - Preserved
+ GR28-GR31 Special Only accessed
+ explicitly
+ LR Return address after CALL Clobbered
+ CCR/CCCR - Mostly Clobbered
+
+
+================================
+INTERNAL DEBUG-MODE REGISTER ABI
+================================
+
+This is the same as the kernel-mode register ABI for functions calls. The
+difference is that in debug-mode there's a different stack and a different
+exception frame. Almost all the global registers from kernel-mode
+(including the stack pointer) may be changed.
+
+ REGISTER FLAVOUR USE
+ =============== ======= ==============================================
+ GR1 Debug stack pointer
+ GR16 GP-Rel base register for small data
+ GR31 Current debug exception frame pointer
+ (__debug_frame)
+ SCR3 MMU Saved value of GR31
+
+
+Note that debug mode is able to interfere with the kernel's emulated atomic
+ops, so it must be exceedingly careful not to do any that would interact
+with the main kernel in this regard. Hence the debug mode code (gdbstub) is
+almost completely self-contained. The only external code used is the
+sprintf family of functions.
+
+Furthermore, break.S is so complicated because single-step mode does not
+switch off on entry to an exception. That means unless manually disabled,
+single-stepping will blithely go on stepping into things like interrupts.
+See gdbstub.txt for more information.
+
+
+==========================
+VIRTUAL INTERRUPT HANDLING
+==========================
+
+Because accesses to the PSR is so slow, and to disable interrupts we have
+to access it twice (once to read and once to write), we don't actually
+disable interrupts at all if we don't have to. What we do instead is use
+the ICC2 condition code flags to note virtual disablement, such that if we
+then do take an interrupt, we note the flag, really disable interrupts, set
+another flag and resume execution at the point the interrupt happened.
+Setting condition flags as a side effect of an arithmetic or logical
+instruction is really fast. This use of the ICC2 only occurs within the
+kernel - it does not affect userspace.
+
+The flags we use are:
+
+ (*) CCR.ICC2.Z [Zero flag]
+
+ Set to virtually disable interrupts, clear when interrupts are
+ virtually enabled. Can be modified by logical instructions without
+ affecting the Carry flag.
+
+ (*) CCR.ICC2.C [Carry flag]
+
+ Clear to indicate hardware interrupts are really disabled, set otherwise.
+
+
+What happens is this:
+
+ (1) Normal kernel-mode operation.
+
+ ICC2.Z is 0, ICC2.C is 1.
+
+ (2) An interrupt occurs. The exception prologue examines ICC2.Z and
+ determines that nothing needs doing. This is done simply with an
+ unlikely BEQ instruction.
+
+ (3) The interrupts are disabled (local_irq_disable)
+
+ ICC2.Z is set to 1.
+
+ (4) If interrupts were then re-enabled (local_irq_enable):
+
+ ICC2.Z would be set to 0.
+
+ A TIHI #2 instruction (trap #2 if condition HI - Z==0 && C==0) would
+ be used to trap if interrupts were now virtually enabled, but
+ physically disabled - which they're not, so the trap isn't taken. The
+ kernel would then be back to state (1).
+
+ (5) An interrupt occurs. The exception prologue examines ICC2.Z and
+ determines that the interrupt shouldn't actually have happened. It
+ jumps aside, and there disabled interrupts by setting PSR.PIL to 14
+ and then it clears ICC2.C.
+
+ (6) If interrupts were then saved and disabled again (local_irq_save):
+
+ ICC2.Z would be shifted into the save variable and masked off
+ (giving a 1).
+
+ ICC2.Z would then be set to 1 (thus unchanged), and ICC2.C would be
+ unaffected (ie: 0).
+
+ (7) If interrupts were then restored from state (6) (local_irq_restore):
+
+ ICC2.Z would be set to indicate the result of XOR'ing the saved
+ value (ie: 1) with 1, which gives a result of 0 - thus leaving
+ ICC2.Z set.
+
+ ICC2.C would remain unaffected (ie: 0).
+
+ A TIHI #2 instruction would be used to again assay the current state,
+ but this would do nothing as Z==1.
+
+ (8) If interrupts were then enabled (local_irq_enable):
+
+ ICC2.Z would be cleared. ICC2.C would be left unaffected. Both
+ flags would now be 0.
+
+ A TIHI #2 instruction again issued to assay the current state would
+ then trap as both Z==0 [interrupts virtually enabled] and C==0
+ [interrupts really disabled] would then be true.
+
+ (9) The trap #2 handler would simply enable hardware interrupts
+ (set PSR.PIL to 0), set ICC2.C to 1 and return.
+
+(10) Immediately upon returning, the pending interrupt would be taken.
+
+(11) The interrupt handler would take the path of actually processing the
+ interrupt (ICC2.Z is clear, BEQ fails as per step (2)).
+
+(12) The interrupt handler would then set ICC2.C to 1 since hardware
+ interrupts are definitely enabled - or else the kernel wouldn't be here.
+
+(13) On return from the interrupt handler, things would be back to state (1).
+
+This trap (#2) is only available in kernel mode. In user mode it will
+result in SIGILL.
--- /dev/null
+ =================================
+ FR451 MMU LINUX MEMORY MANAGEMENT
+ =================================
+
+============
+MMU HARDWARE
+============
+
+FR451 MMU Linux puts the MMU into EDAT mode whilst running. This means that it uses both the SAT
+registers and the DAT TLB to perform address translation.
+
+There are 8 IAMLR/IAMPR register pairs and 16 DAMLR/DAMPR register pairs for SAT mode.
+
+In DAT mode, there is also a TLB organised in cache format as 64 lines x 2 ways. Each line spans a
+16KB range of addresses, but can match a larger region.
+
+
+===========================
+MEMORY MANAGEMENT REGISTERS
+===========================
+
+Certain control registers are used by the kernel memory management routines:
+
+ REGISTERS USAGE
+ ====================== ==================================================
+ IAMR0, DAMR0 Kernel image and data mappings
+ IAMR1, DAMR1 First-chance TLB lookup mapping
+ DAMR2 Page attachment for cache flush by page
+ DAMR3 Current PGD mapping
+ SCR0, DAMR4 Instruction TLB PGE/PTD cache
+ SCR1, DAMR5 Data TLB PGE/PTD cache
+ DAMR6-10 kmap_atomic() mappings
+ DAMR11 I/O mapping
+ CXNR mm_struct context ID
+ TTBR Page directory (PGD) pointer (physical address)
+
+
+=====================
+GENERAL MEMORY LAYOUT
+=====================
+
+The physical memory layout is as follows:
+
+ PHYSICAL ADDRESS CONTROLLER DEVICE
+ =================== ============== =======================================
+ 00000000 - BFFFFFFF SDRAM SDRAM area
+ E0000000 - EFFFFFFF L-BUS CS2# VDK SLBUS/PCI window
+ F0000000 - F0FFFFFF L-BUS CS5# MB93493 CSC area (DAV daughter board)
+ F1000000 - F1FFFFFF L-BUS CS7# (CB70 CPU-card PCMCIA port I/O space)
+ FC000000 - FC0FFFFF L-BUS CS1# VDK MB86943 config space
+ FC100000 - FC1FFFFF L-BUS CS6# DM9000 NIC I/O space
+ FC200000 - FC2FFFFF L-BUS CS3# MB93493 CSR area (DAV daughter board)
+ FD000000 - FDFFFFFF L-BUS CS4# (CB70 CPU-card extra flash space)
+ FE000000 - FEFFFFFF Internal CPU peripherals
+ FF000000 - FF1FFFFF L-BUS CS0# Flash 1
+ FF200000 - FF3FFFFF L-BUS CS0# Flash 2
+ FFC00000 - FFC0001F L-BUS CS0# FPGA
+
+The virtual memory layout is:
+
+ VIRTUAL ADDRESS PHYSICAL TRANSLATOR FLAGS SIZE OCCUPATION
+ ================= ======== ============== ======= ======= ===================================
+ 00004000-BFFFFFFF various TLB,xAMR1 D-N-??V 3GB Userspace
+ C0000000-CFFFFFFF 00000000 xAMPR0 -L-S--V 256MB Kernel image and data
+ D0000000-D7FFFFFF various TLB,xAMR1 D-NS??V 128MB vmalloc area
+ D8000000-DBFFFFFF various TLB,xAMR1 D-NS??V 64MB kmap() area
+ DC000000-DCFFFFFF various TLB 1MB Secondary kmap_atomic() frame
+ DD000000-DD27FFFF various DAMR 160KB Primary kmap_atomic() frame
+ DD040000 DAMR2/IAMR2 -L-S--V page Page cache flush attachment point
+ DD080000 DAMR3 -L-SC-V page Page Directory (PGD)
+ DD0C0000 DAMR4 -L-SC-V page Cached insn TLB Page Table lookup
+ DD100000 DAMR5 -L-SC-V page Cached data TLB Page Table lookup
+ DD140000 DAMR6 -L-S--V page kmap_atomic(KM_BOUNCE_READ)
+ DD180000 DAMR7 -L-S--V page kmap_atomic(KM_SKB_SUNRPC_DATA)
+ DD1C0000 DAMR8 -L-S--V page kmap_atomic(KM_SKB_DATA_SOFTIRQ)
+ DD200000 DAMR9 -L-S--V page kmap_atomic(KM_USER0)
+ DD240000 DAMR10 -L-S--V page kmap_atomic(KM_USER1)
+ E0000000-FFFFFFFF E0000000 DAMR11 -L-SC-V 512MB I/O region
+
+IAMPR1 and DAMPR1 are used as an extension to the TLB.
+
+
+====================
+KMAP AND KMAP_ATOMIC
+====================
+
+To access pages in the page cache (which may not be directly accessible if highmem is available),
+the kernel calls kmap(), does the access and then calls kunmap(); or it calls kmap_atomic(), does
+the access and then calls kunmap_atomic().
+
+kmap() creates an attachment between an arbitrary inaccessible page and a range of virtual
+addresses by installing a PTE in a special page table. The kernel can then access this page as it
+wills. When it's finished, the kernel calls kunmap() to clear the PTE.
+
+kmap_atomic() does something slightly different. In the interests of speed, it chooses one of two
+strategies:
+
+ (1) If possible, kmap_atomic() attaches the requested page to one of DAMPR5 through DAMPR10
+ register pairs; and the matching kunmap_atomic() clears the DAMPR. This makes high memory
+ support really fast as there's no need to flush the TLB or modify the page tables. The DAMLR
+ registers being used for this are preset during boot and don't change over the lifetime of the
+ process. There's a direct mapping between the first few kmap_atomic() types, DAMR number and
+ virtual address slot.
+
+ However, there are more kmap_atomic() types defined than there are DAMR registers available,
+ so we fall back to:
+
+ (2) kmap_atomic() uses a slot in the secondary frame (determined by the type parameter), and then
+ locks an entry in the TLB to translate that slot to the specified page. The number of slots is
+ obviously limited, and their positions are controlled such that each slot is matched by a
+ different line in the TLB. kunmap() ejects the entry from the TLB.
+
+Note that the first three kmap atomic types are really just declared as placeholders. The DAMPR
+registers involved are actually modified directly.
+
+Also note that kmap() itself may sleep, kmap_atomic() may never sleep and both always succeed;
+furthermore, a driver using kmap() may sleep before calling kunmap(), but may not sleep before
+calling kunmap_atomic() if it had previously called kmap_atomic().
+
+
+===============================
+USING MORE THAN 256MB OF MEMORY
+===============================
+
+The kernel cannot access more than 256MB of memory directly. The physical layout, however, permits
+up to 3GB of SDRAM (possibly 3.25GB) to be made available. By using CONFIG_HIGHMEM, the kernel can
+allow userspace (by way of page tables) and itself (by way of kmap) to deal with the memory
+allocation.
+
+External devices can, of course, still DMA to and from all of the SDRAM, even if the kernel can't
+see it directly. The kernel translates page references into real addresses for communicating to the
+devices.
+
+
+===================
+PAGE TABLE TOPOLOGY
+===================
+
+The page tables are arranged in 2-layer format. There is a middle layer (PMD) that would be used in
+3-layer format tables but that is folded into the top layer (PGD) and so consumes no extra memory
+or processing power.
+
+ +------+ PGD PMD
+ | TTBR |--->+-------------------+
+ +------+ | | : STE |
+ | PGE0 | PME0 : STE |
+ | | : STE |
+ +-------------------+ Page Table
+ | | : STE -------------->+--------+ +0x0000
+ | PGE1 | PME0 : STE -----------+ | PTE0 |
+ | | : STE -------+ | +--------+
+ +-------------------+ | | | PTE63 |
+ | | : STE | | +-->+--------+ +0x0100
+ | PGE2 | PME0 : STE | | | PTE64 |
+ | | : STE | | +--------+
+ +-------------------+ | | PTE127 |
+ | | : STE | +------>+--------+ +0x0200
+ | PGE3 | PME0 : STE | | PTE128 |
+ | | : STE | +--------+
+ +-------------------+ | PTE191 |
+ +--------+ +0x0300
+
+Each Page Directory (PGD) is 16KB (page size) in size and is divided into 64 entries (PGEs). Each
+PGE contains one Page Mid Directory (PMD).
+
+Each PMD is 256 bytes in size and contains a single entry (PME). Each PME holds 64 FR451 MMU
+segment table entries of 4 bytes apiece. Each PME "points to" a page table. In practice, each STE
+points to a subset of the page table, the first to PT+0x0000, the second to PT+0x0100, the third to
+PT+0x200, and so on.
+
+Each PGE and PME covers 64MB of the total virtual address space.
+
+Each Page Table (PTD) is 16KB (page size) in size, and is divided into 4096 entries (PTEs). Each
+entry can point to one 16KB page. In practice, each Linux page table is subdivided into 64 FR451
+MMU page tables. But they are all grouped together to make management easier, in particular rmap
+support is then trivial.
+
+Grouping page tables in this fashion makes PGE caching in SCR0/SCR1 more efficient because the
+coverage of the cached item is greater.
+
+Page tables for the vmalloc area are allocated at boot time and shared between all mm_structs.
+
+
+=================
+USER SPACE LAYOUT
+=================
+
+For MMU capable Linux, the regions userspace code are allowed to access are kept entirely separate
+from those dedicated to the kernel:
+
+ VIRTUAL ADDRESS SIZE PURPOSE
+ ================= ===== ===================================
+ 00000000-00003fff 4KB NULL pointer access trap
+ 00004000-01ffffff ~32MB lower mmap space (grows up)
+ 02000000-021fffff 2MB Stack space (grows down from top)
+ 02200000-nnnnnnnn Executable mapping
+ nnnnnnnn- brk space (grows up)
+ -bfffffff upper mmap space (grows down)
+
+This is so arranged so as to make best use of the 16KB page tables and the way in which PGEs/PMEs
+are cached by the TLB handler. The lower mmap space is filled first, and then the upper mmap space
+is filled.
+
+
+===============================
+GDB-STUB MMU DEBUGGING SERVICES
+===============================
+
+The gdb-stub included in this kernel provides a number of services to aid in the debugging of MMU
+related kernel services:
+
+ (*) Every time the kernel stops, certain state information is dumped into __debug_mmu. This
+ variable is defined in arch/frv/kernel/gdb-stub.c. Note that the gdbinit file in this
+ directory has some useful macros for dealing with this.
+
+ (*) __debug_mmu.tlb[]
+
+ This receives the current TLB contents. This can be viewed with the _tlb GDB macro:
+
+ (gdb) _tlb
+ tlb[0x00]: 01000005 00718203 01000002 00718203
+ tlb[0x01]: 01004002 006d4201 01004005 006d4203
+ tlb[0x02]: 01008002 006d0201 01008006 00004200
+ tlb[0x03]: 0100c006 007f4202 0100c002 0064c202
+ tlb[0x04]: 01110005 00774201 01110002 00774201
+ tlb[0x05]: 01114005 00770201 01114002 00770201
+ tlb[0x06]: 01118002 0076c201 01118005 0076c201
+ ...
+ tlb[0x3d]: 010f4002 00790200 001f4002 0054ca02
+ tlb[0x3e]: 010f8005 0078c201 010f8002 0078c201
+ tlb[0x3f]: 001fc002 0056ca01 001fc005 00538a01
+
+ (*) __debug_mmu.iamr[]
+ (*) __debug_mmu.damr[]
+
+ These receive the current IAMR and DAMR contents. These can be viewed with the _amr
+ GDB macro:
+
+ (gdb) _amr
+ AMRx DAMR IAMR
+ ==== ===================== =====================
+ amr0 : L:c0000000 P:00000cb9 : L:c0000000 P:000004b9
+ amr1 : L:01070005 P:006f9203 : L:0102c005 P:006a1201
+ amr2 : L:d8d00000 P:00000000 : L:d8d00000 P:00000000
+ amr3 : L:d8d04000 P:00534c0d : L:00000000 P:00000000
+ amr4 : L:d8d08000 P:00554c0d : L:00000000 P:00000000
+ amr5 : L:d8d0c000 P:00554c0d : L:00000000 P:00000000
+ amr6 : L:d8d10000 P:00000000 : L:00000000 P:00000000
+ amr7 : L:d8d14000 P:00000000 : L:00000000 P:00000000
+ amr8 : L:d8d18000 P:00000000
+ amr9 : L:d8d1c000 P:00000000
+ amr10: L:d8d20000 P:00000000
+ amr11: L:e0000000 P:e0000ccd
+
+ (*) The current task's page directory is bound to DAMR3.
+
+ This can be viewed with the _pgd GDB macro:
+
+ (gdb) _pgd
+ $3 = {{pge = {{ste = {0x554001, 0x554101, 0x554201, 0x554301, 0x554401,
+ 0x554501, 0x554601, 0x554701, 0x554801, 0x554901, 0x554a01,
+ 0x554b01, 0x554c01, 0x554d01, 0x554e01, 0x554f01, 0x555001,
+ 0x555101, 0x555201, 0x555301, 0x555401, 0x555501, 0x555601,
+ 0x555701, 0x555801, 0x555901, 0x555a01, 0x555b01, 0x555c01,
+ 0x555d01, 0x555e01, 0x555f01, 0x556001, 0x556101, 0x556201,
+ 0x556301, 0x556401, 0x556501, 0x556601, 0x556701, 0x556801,
+ 0x556901, 0x556a01, 0x556b01, 0x556c01, 0x556d01, 0x556e01,
+ 0x556f01, 0x557001, 0x557101, 0x557201, 0x557301, 0x557401,
+ 0x557501, 0x557601, 0x557701, 0x557801, 0x557901, 0x557a01,
+ 0x557b01, 0x557c01, 0x557d01, 0x557e01, 0x557f01}}}}, {pge = {{
+ ste = {0x0 <repeats 64 times>}}}} <repeats 51 times>, {pge = {{ste = {
+ 0x248001, 0x248101, 0x248201, 0x248301, 0x248401, 0x248501,
+ 0x248601, 0x248701, 0x248801, 0x248901, 0x248a01, 0x248b01,
+ 0x248c01, 0x248d01, 0x248e01, 0x248f01, 0x249001, 0x249101,
+ 0x249201, 0x249301, 0x249401, 0x249501, 0x249601, 0x249701,
+ 0x249801, 0x249901, 0x249a01, 0x249b01, 0x249c01, 0x249d01,
+ 0x249e01, 0x249f01, 0x24a001, 0x24a101, 0x24a201, 0x24a301,
+ 0x24a401, 0x24a501, 0x24a601, 0x24a701, 0x24a801, 0x24a901,
+ 0x24aa01, 0x24ab01, 0x24ac01, 0x24ad01, 0x24ae01, 0x24af01,
+ 0x24b001, 0x24b101, 0x24b201, 0x24b301, 0x24b401, 0x24b501,
+ 0x24b601, 0x24b701, 0x24b801, 0x24b901, 0x24ba01, 0x24bb01,
+ 0x24bc01, 0x24bd01, 0x24be01, 0x24bf01}}}}, {pge = {{ste = {
+ 0x0 <repeats 64 times>}}}} <repeats 11 times>}
+
+ (*) The PTD last used by the instruction TLB miss handler is attached to DAMR4.
+ (*) The PTD last used by the data TLB miss handler is attached to DAMR5.
+
+ These can be viewed with the _ptd_i and _ptd_d GDB macros:
+
+ (gdb) _ptd_d
+ $5 = {{pte = 0x0} <repeats 127 times>, {pte = 0x539b01}, {
+ pte = 0x0} <repeats 896 times>, {pte = 0x719303}, {pte = 0x6d5303}, {
+ pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
+ pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x6a1303}, {
+ pte = 0x0} <repeats 12 times>, {pte = 0x709303}, {pte = 0x0}, {pte = 0x0},
+ {pte = 0x6fd303}, {pte = 0x6f9303}, {pte = 0x6f5303}, {pte = 0x0}, {
+ pte = 0x6ed303}, {pte = 0x531b01}, {pte = 0x50db01}, {
+ pte = 0x0} <repeats 13 times>, {pte = 0x5303}, {pte = 0x7f5303}, {
+ pte = 0x509b01}, {pte = 0x505b01}, {pte = 0x7c9303}, {pte = 0x7b9303}, {
+ pte = 0x7b5303}, {pte = 0x7b1303}, {pte = 0x7ad303}, {pte = 0x0}, {
+ pte = 0x0}, {pte = 0x7a1303}, {pte = 0x0}, {pte = 0x795303}, {pte = 0x0}, {
+ pte = 0x78d303}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
+ pte = 0x0}, {pte = 0x775303}, {pte = 0x771303}, {pte = 0x76d303}, {
+ pte = 0x0}, {pte = 0x765303}, {pte = 0x7c5303}, {pte = 0x501b01}, {
+ pte = 0x4f1b01}, {pte = 0x4edb01}, {pte = 0x0}, {pte = 0x4f9b01}, {
+ pte = 0x4fdb01}, {pte = 0x0} <repeats 2992 times>}
+++ /dev/null
- ================================
- Fujitsu FR-V LINUX DOCUMENTATION
- ================================
-
-This directory contains documentation for the Fujitsu FR-V CPU architecture
-port of Linux.
-
-The following documents are available:
-
- (*) features.txt
-
- A description of the basic features inherent in this architecture port.
-
-
- (*) configuring.txt
-
- A summary of the configuration options particular to this architecture.
-
-
- (*) booting.txt
-
- A description of how to boot the kernel image and a summary of the kernel
- command line options.
-
-
- (*) gdbstub.txt
-
- A description of how to debug the kernel using GDB attached by serial
- port, and a summary of the services available.
-
-
- (*) mmu-layout.txt
-
- A description of the virtual and physical memory layout used in the
- MMU linux kernel, and the registers used to support it.
-
-
- (*) gdbinit
-
- An example .gdbinit file for use with GDB. It includes macros for viewing
- MMU state on the FR451. See mmu-layout.txt for more information.
-
-
- (*) clock.txt
-
- A description of the CPU clock scaling interface.
-
-
- (*) atomic-ops.txt
-
- A description of how the FR-V kernel's atomic operations work.
+++ /dev/null
- =====================================
- FUJITSU FR-V KERNEL ATOMIC OPERATIONS
- =====================================
-
-On the FR-V CPUs, there is only one atomic Read-Modify-Write operation: the SWAP/SWAPI
-instruction. Unfortunately, this alone can't be used to implement the following operations:
-
- (*) Atomic add to memory
-
- (*) Atomic subtract from memory
-
- (*) Atomic bit modification (set, clear or invert)
-
- (*) Atomic compare and exchange
-
-On such CPUs, the standard way of emulating such operations in uniprocessor mode is to disable
-interrupts, but on the FR-V CPUs, modifying the PSR takes a lot of clock cycles, and it has to be
-done twice. This means the CPU runs for a relatively long time with interrupts disabled,
-potentially having a great effect on interrupt latency.
-
-
-=============
-NEW ALGORITHM
-=============
-
-To get around this, the following algorithm has been implemented. It operates in a way similar to
-the LL/SC instruction pairs supported on a number of platforms.
-
- (*) The CCCR.CC3 register is reserved within the kernel to act as an atomic modify abort flag.
-
- (*) In the exception prologues run on kernel->kernel entry, CCCR.CC3 is set to 0 (Undefined
- state).
-
- (*) All atomic operations can then be broken down into the following algorithm:
-
- (1) Set ICC3.Z to true and set CC3 to True (ORCC/CKEQ/ORCR).
-
- (2) Load the value currently in the memory to be modified into a register.
-
- (3) Make changes to the value.
-
- (4) If CC3 is still True, simultaneously and atomically (by VLIW packing):
-
- (a) Store the modified value back to memory.
-
- (b) Set ICC3.Z to false (CORCC on GR29 is sufficient for this - GR29 holds the current
- task pointer in the kernel, and so is guaranteed to be non-zero).
-
- (5) If ICC3.Z is still true, go back to step (1).
-
-This works in a non-SMP environment because any interrupt or other exception that happens between
-steps (1) and (4) will set CC3 to the Undefined, thus aborting the store in (4a), and causing the
-condition in ICC3 to remain with the Z flag set, thus causing step (5) to loop back to step (1).
-
-
-This algorithm suffers from two problems:
-
- (1) The condition CCCR.CC3 is cleared unconditionally by an exception, irrespective of whether or
- not any changes were made to the target memory location during that exception.
-
- (2) The branch from step (5) back to step (1) may have to happen more than once until the store
- manages to take place. In theory, this loop could cycle forever because there are too many
- interrupts coming in, but it's unlikely.
-
-
-=======
-EXAMPLE
-=======
-
-Taking an example from include/asm-frv/atomic.h:
-
- static inline int atomic_add_return(int i, atomic_t *v)
- {
- unsigned long val;
-
- asm("0: \n"
-
-It starts by setting ICC3.Z to true for later use, and also transforming that into CC3 being in the
-True state.
-
- " orcc gr0,gr0,gr0,icc3 \n" <-- (1)
- " ckeq icc3,cc7 \n" <-- (1)
-
-Then it does the load. Note that the final phase of step (1) is done at the same time as the
-load. The VLIW packing ensures they are done simultaneously. The ".p" on the load must not be
-removed without swapping the order of these two instructions.
-
- " ld.p %M0,%1 \n" <-- (2)
- " orcr cc7,cc7,cc3 \n" <-- (1)
-
-Then the proposed modification is generated. Note that the old value can be retained if required
-(such as in test_and_set_bit()).
-
- " add%I2 %1,%2,%1 \n" <-- (3)
-
-Then it attempts to store the value back, contingent on no exception having cleared CC3 since it
-was set to True.
-
- " cst.p %1,%M0 ,cc3,#1 \n" <-- (4a)
-
-It simultaneously records the success or failure of the store in ICC3.Z.
-
- " corcc gr29,gr29,gr0 ,cc3,#1 \n" <-- (4b)
-
-Such that the branch can then be taken if the operation was aborted.
-
- " beq icc3,#0,0b \n" <-- (5)
- : "+U"(v->counter), "=&r"(val)
- : "NPr"(i)
- : "memory", "cc7", "cc3", "icc3"
- );
-
- return val;
- }
-
-
-=============
-CONFIGURATION
-=============
-
-The atomic ops implementation can be made inline or out-of-line by changing the
-CONFIG_FRV_OUTOFLINE_ATOMIC_OPS configuration variable. Making it out-of-line has a number of
-advantages:
-
- - The resulting kernel image may be smaller
- - Debugging is easier as atomic ops can just be stepped over and they can be breakpointed
-
-Keeping it inline also has a number of advantages:
-
- - The resulting kernel may be Faster
- - no out-of-line function calls need to be made
- - the compiler doesn't have half its registers clobbered by making a call
-
-The out-of-line implementations live in arch/frv/lib/atomic-ops.S.
+++ /dev/null
- =========================
- BOOTING FR-V LINUX KERNEL
- =========================
-
-======================
-PROVIDING A FILESYSTEM
-======================
-
-First of all, a root filesystem must be made available. This can be done in
-one of two ways:
-
- (1) NFS Export
-
- A filesystem should be constructed in a directory on an NFS server that
- the target board can reach. This directory should then be NFS exported
- such that the target board can read and write into it as root.
-
- (2) Flash Filesystem (JFFS2 Recommended)
-
- In this case, the image must be stored or built up on flash before it
- can be used. A complete image can be built using the mkfs.jffs2 or
- similar program and then downloaded and stored into flash by RedBoot.
-
-
-========================
-LOADING THE KERNEL IMAGE
-========================
-
-The kernel will need to be loaded into RAM by RedBoot (or by some alternative
-boot loader) before it can be run. The kernel image (arch/frv/boot/Image) may
-be loaded in one of three ways:
-
- (1) Load from Flash
-
- This is the simplest. RedBoot can store an image in the flash (see the
- RedBoot documentation) and then load it back into RAM. RedBoot keeps
- track of the load address, entry point and size, so the command to do
- this is simply:
-
- fis load linux
-
- The image is then ready to be executed.
-
- (2) Load by TFTP
-
- The following command will download a raw binary kernel image from the
- default server (as negotiated by BOOTP) and store it into RAM:
-
- load -b 0x00100000 -r /tftpboot/image.bin
-
- The image is then ready to be executed.
-
- (3) Load by Y-Modem
-
- The following command will download a raw binary kernel image across the
- serial port that RedBoot is currently using:
-
- load -m ymodem -b 0x00100000 -r zImage
-
- The serial client (such as minicom) must then be told to transmit the
- program by Y-Modem.
-
- When finished, the image will then be ready to be executed.
-
-
-==================
-BOOTING THE KERNEL
-==================
-
-Boot the image with the following RedBoot command:
-
- exec -c "<CMDLINE>" 0x00100000
-
-For example:
-
- exec -c "console=ttySM0,115200 ip=:::::dhcp root=/dev/mtdblock2 rw"
-
-This will start the kernel running. Note that if the GDB-stub is compiled in,
-then the kernel will immediately wait for GDB to connect over serial before
-doing anything else. See the section on kernel debugging with GDB.
-
-The kernel command line <CMDLINE> tells the kernel where its console is and
-how to find its root filesystem. This is made up of the following components,
-separated by spaces:
-
- (*) console=ttyS<x>[,<baud>[<parity>[<bits>[<flow>]]]]
-
- This specifies that the system console should output through on-chip
- serial port <x> (which can be "0" or "1").
-
- <baud> is a standard baud rate between 1200 and 115200 (default 9600).
-
- <parity> is a parity setting of "N", "O", "E", "M" or "S" for None, Odd,
- Even, Mark or Space. "None" is the default.
-
- <stop> is "7" or "8" for the number of bits per character. "8" is the
- default.
-
- <flow> is "r" to use flow control (XCTS on serial port 2 only). The
- default is to not use flow control.
-
- For example:
-
- console=ttyS0,115200
-
- To use the first on-chip serial port at baud rate 115200, no parity, 8
- bits, and no flow control.
-
- (*) root=/dev/<xxxx>
-
- This specifies the device upon which the root filesystem resides. For
- example:
-
- /dev/nfs NFS root filesystem
- /dev/mtdblock3 Fourth RedBoot partition on the System Flash
-
- (*) rw
-
- Start with the root filesystem mounted Read/Write.
-
- The remaining components are all optional:
-
- (*) ip=<ip>::::<host>:<iface>:<cfg>
-
- Configure the network interface. If <cfg> is "off" then <ip> should
- specify the IP address for the network device <iface>. <host> provide
- the hostname for the device.
-
- If <cfg> is "bootp" or "dhcp", then all of these parameters will be
- discovered by consulting a BOOTP or DHCP server.
-
- For example, the following might be used:
-
- ip=192.168.73.12::::frv:eth0:off
-
- This sets the IP address on the VDK motherboard RTL8029 ethernet chipset
- (eth0) to be 192.168.73.12, and sets the board's hostname to be "frv".
-
- (*) nfsroot=<server>:<dir>[,v<vers>]
-
- This is mandatory if "root=/dev/nfs" is given as an option. It tells the
- kernel the IP address of the NFS server providing its root filesystem,
- and the pathname on that server of the filesystem.
-
- The NFS version to use can also be specified. v2 and v3 are supported by
- Linux.
-
- For example:
-
- nfsroot=192.168.73.1:/nfsroot-frv
-
- (*) profile=1
-
- Turns on the kernel profiler (accessible through /proc/profile).
-
- (*) console=gdb0
-
- This can be used as an alternative to the "console=ttyS..." listed
- above. I tells the kernel to pass the console output to GDB if the
- gdbstub is compiled in to the kernel.
-
- If this is used, then the gdbstub passes the text to GDB, which then
- simply dumps it to its standard output.
-
- (*) mem=<xxx>M
-
- Normally the kernel will work out how much SDRAM it has by reading the
- SDRAM controller registers. That can be overridden with this
- option. This allows the kernel to be told that it has <xxx> megabytes of
- memory available.
-
- (*) init=<prog> [<arg> [<arg> [<arg> ...]]]
-
- This tells the kernel what program to run initially. By default this is
- /sbin/init, but /sbin/sash or /bin/sh are common alternatives.
-
- (*) vdc=...
-
- This option configures the MB93493 companion chip visual display
- driver. Please see Documentation/fujitsu/mb93493/vdc.txt for more
- information.
+++ /dev/null
-Clock scaling
--------------
-
-The kernel supports scaling of CLCK.CMODE, CLCK.CM and CLKC.P0 clock
-registers. If built with CONFIG_PM and CONFIG_SYSCTL options enabled, four
-extra files will appear in the directory /proc/sys/pm/. Reading these files
-will show:
-
- p0 -- current value of the P0 bit in CLKC register.
- cm -- current value of the CM bits in CLKC register.
- cmode -- current value of the CMODE bits in CLKC register.
-
-On all boards, the 'p0' file should also be writable, and either '1' or '0'
-can be rewritten, to set or clear the CLKC_P0 bit respectively, hence
-controlling whether the resource bus rate clock is halved.
-
-The 'cm' file should also be available on all boards. '0' can be written to it
-to shift the board into High-Speed mode (normal), and '1' can be written to
-shift the board into Medium-Speed mode. Selecting Low-Speed mode is not
-supported by this interface, even though some CPUs do support it.
-
-On the boards with FR405 CPU (i.e. CB60 and CB70), the 'cmode' file is also
-writable, allowing the CPU core speed (and other clock speeds) to be
-controlled from userspace.
-
-
-Determining current and possible settings
------------------------------------------
-
-The current state and the available masks can be found in /proc/cpuinfo. For
-example, on the CB70:
-
- # cat /proc/cpuinfo
- CPU-Series: fr400
- CPU-Core: fr405, gr0-31, BE, CCCR
- CPU: mb93405
- MMU: Prot
- FP-Media: fr0-31, Media
- System: mb93091-cb70, mb93090-mb00
- PM-Controls: cmode=0xd31f, cm=0x3, p0=0x3, suspend=0x9
- PM-Status: cmode=3, cm=0, p0=0
- Clock-In: 50.00 MHz
- Clock-Core: 300.00 MHz
- Clock-SDRAM: 100.00 MHz
- Clock-CBus: 100.00 MHz
- Clock-Res: 50.00 MHz
- Clock-Ext: 50.00 MHz
- Clock-DSU: 25.00 MHz
- BogoMips: 300.00
-
-And on the PDK, the PM lines look like the following:
-
- PM-Controls: cm=0x3, p0=0x3, suspend=0x9
- PM-Status: cmode=9, cm=0, p0=0
-
-The PM-Controls line, if present, will indicate which /proc/sys/pm files can
-be set to what values. The specification values are bitmasks; so, for example,
-"suspend=0x9" indicates that 0 and 3 can be written validly to
-/proc/sys/pm/suspend.
-
-The PM-Controls line will only be present if CONFIG_PM is configured to Y.
-
-The PM-Status line indicates which clock controls are set to which value. If
-the file can be read, then the suspend value must be 0, and so that's not
-included.
+++ /dev/null
- =======================================
- FUJITSU FR-V LINUX KERNEL CONFIGURATION
- =======================================
-
-=====================
-CONFIGURATION OPTIONS
-=====================
-
-The most important setting is in the "MMU support options" tab (the first
-presented in the configuration tools available):
-
- (*) "Kernel Type"
-
- This options allows selection of normal, MMU-requiring linux, and uClinux
- (which doesn't require an MMU and doesn't have inter-process protection).
-
-There are a number of settings in the "Processor type and features" section of
-the kernel configuration that need to be considered.
-
- (*) "CPU"
-
- The register and instruction sets at the core of the processor. This can
- only be set to "FR40x/45x/55x" at the moment - but this permits usage of
- the kernel with MB93091 CB10, CB11, CB30, CB41, CB60, CB70 and CB451
- CPU boards, and with the MB93093 PDK board.
-
- (*) "System"
-
- This option allows a choice of basic system. This governs the peripherals
- that are expected to be available.
-
- (*) "Motherboard"
-
- This specifies the type of motherboard being used, and the peripherals
- upon it. Currently only "MB93090-MB00" can be set here.
-
- (*) "Default cache-write mode"
-
- This controls the initial data cache write management mode. By default
- Write-Through is selected, but Write-Back (Copy-Back) can also be
- selected. This can be changed dynamically once the kernel is running (see
- features.txt).
-
-There are some architecture specific configuration options in the "General
-Setup" section of the kernel configuration too:
-
- (*) "Reserve memory uncached for (PCI) DMA"
-
- This requests that a uClinux kernel set aside some memory in an uncached
- window for the use as consistent DMA memory (mainly for PCI). At least a
- megabyte will be allocated in this way, possibly more. Any memory so
- reserved will not be available for normal allocations.
-
- (*) "Kernel support for ELF-FDPIC binaries"
-
- This enables the binary-format driver for the new FDPIC ELF binaries that
- this platform normally uses. These binaries are totally relocatable -
- their separate sections can relocated independently, allowing them to be
- shared on uClinux where possible. This should normally be enabled.
-
- (*) "Kernel image protection"
-
- This makes the protection register governing access to the core kernel
- image prohibit access by userspace programs. This option is available on
- uClinux only.
-
-There are also a number of settings in the "Kernel Hacking" section of the
-kernel configuration especially for debugging a kernel on this
-architecture. See the "gdbstub.txt" file for information about those.
-
-
-======================
-DEFAULT CONFIGURATIONS
-======================
-
-The kernel sources include a number of example default configurations:
-
- (*) defconfig-mb93091
-
- Default configuration for the MB93091-VDK with both CPU board and
- MB93090-MB00 motherboard running uClinux.
-
-
- (*) defconfig-mb93091-fb
-
- Default configuration for the MB93091-VDK with CPU board,
- MB93090-MB00 motherboard, and DAV board running uClinux.
- Includes framebuffer driver.
-
-
- (*) defconfig-mb93093
-
- Default configuration for the MB93093-PDK board running uClinux.
-
-
- (*) defconfig-cb70-standalone
-
- Default configuration for the MB93091-VDK with only CB70 CPU board
- running uClinux. This will use the CB70's DM9000 for network access.
-
-
- (*) defconfig-mmu
-
- Default configuration for the MB93091-VDK with both CB451 CPU board and
- MB93090-MB00 motherboard running MMU linux.
-
- (*) defconfig-mmu-audio
-
- Default configuration for the MB93091-VDK with CB451 CPU board, DAV
- board, and MB93090-MB00 motherboard running MMU linux. Includes
- audio driver.
-
- (*) defconfig-mmu-fb
-
- Default configuration for the MB93091-VDK with CB451 CPU board, DAV
- board, and MB93090-MB00 motherboard running MMU linux. Includes
- framebuffer driver.
-
- (*) defconfig-mmu-standalone
-
- Default configuration for the MB93091-VDK with only CB451 CPU board
- running MMU linux.
-
-
-
+++ /dev/null
- ===========================
- FUJITSU FR-V LINUX FEATURES
- ===========================
-
-This kernel port has a number of features of which the user should be aware:
-
- (*) Linux and uClinux
-
- The FR-V architecture port supports both normal MMU linux and uClinux out
- of the same sources.
-
-
- (*) CPU support
-
- Support for the FR401, FR403, FR405, FR451 and FR555 CPUs should work with
- the same uClinux kernel configuration.
-
- In normal (MMU) Linux mode, only the FR451 CPU will work as that is the
- only one with a suitably featured CPU.
-
- The kernel is written and compiled with the assumption that only the
- bottom 32 GR registers and no FR registers will be used by the kernel
- itself, however all extra userspace registers will be saved on context
- switch. Note that since most CPUs can't support lazy switching, no attempt
- is made to do lazy register saving where that would be possible (FR555
- only currently).
-
-
- (*) Board support
-
- The board on which the kernel will run can be configured on the "Processor
- type and features" configuration tab.
-
- Set the System to "MB93093-PDK" to boot from the MB93093 (FR403) PDK.
-
- Set the System to "MB93091-VDK" to boot from the CB11, CB30, CB41, CB60,
- CB70 or CB451 VDK boards. Set the Motherboard setting to "MB93090-MB00" to
- boot with the standard ATA90590B VDK motherboard, and set it to "None" to
- boot without any motherboard.
-
-
- (*) Binary Formats
-
- The only userspace binary format supported is FDPIC ELF. Normal ELF, FLAT
- and AOUT binaries are not supported for this architecture.
-
- FDPIC ELF supports shared library and program interpreter facilities.
-
-
- (*) Scheduler Speed
-
- The kernel scheduler runs at 100Hz irrespective of the clock speed on this
- architecture. This value is set in asm/param.h (see the HZ macro defined
- there).
-
-
- (*) Normal (MMU) Linux Memory Layout.
-
- See mmu-layout.txt in this directory for a description of the normal linux
- memory layout
-
- See include/asm-frv/mem-layout.h for constants pertaining to the memory
- layout.
-
- See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
- controller configuration.
-
-
- (*) uClinux Memory Layout
-
- The memory layout used by the uClinux kernel is as follows:
-
- 0x00000000 - 0x00000FFF Null pointer catch page
- 0x20000000 - 0x200FFFFF CS2# [PDK] FPGA
- 0xC0000000 - 0xCFFFFFFF SDRAM
- 0xC0000000 Base of Linux kernel image
- 0xE0000000 - 0xEFFFFFFF CS2# [VDK] SLBUS/PCI window
- 0xF0000000 - 0xF0FFFFFF CS5# MB93493 CSC area (DAV daughter board)
- 0xF1000000 - 0xF1FFFFFF CS7# [CB70/CB451] CPU-card PCMCIA port space
- 0xFC000000 - 0xFC0FFFFF CS1# [VDK] MB86943 config space
- 0xFC100000 - 0xFC1FFFFF CS6# [CB70/CB451] CPU-card DM9000 NIC space
- 0xFC100000 - 0xFC1FFFFF CS6# [PDK] AX88796 NIC space
- 0xFC200000 - 0xFC2FFFFF CS3# MB93493 CSR area (DAV daughter board)
- 0xFD000000 - 0xFDFFFFFF CS4# [CB70/CB451] CPU-card extra flash space
- 0xFE000000 - 0xFEFFFFFF Internal CPU peripherals
- 0xFF000000 - 0xFF1FFFFF CS0# Flash 1
- 0xFF200000 - 0xFF3FFFFF CS0# Flash 2
- 0xFFC00000 - 0xFFC0001F CS0# [VDK] FPGA
-
- The kernel reads the size of the SDRAM from the memory bus controller
- registers by default.
-
- The kernel initialisation code (1) adjusts the SDRAM base addresses to
- move the SDRAM to desired address, (2) moves the kernel image down to the
- bottom of SDRAM, (3) adjusts the bus controller registers to move I/O
- windows, and (4) rearranges the protection registers to protect all of
- this.
-
- The reasons for doing this are: (1) the page at address 0 should be
- inaccessible so that NULL pointer errors can be caught; and (2) the bottom
- three quarters are left unoccupied so that an FR-V CPU with an MMU can use
- it for virtual userspace mappings.
-
- See include/asm-frv/mem-layout.h for constants pertaining to the memory
- layout.
-
- See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
- controller configuration.
-
-
- (*) uClinux Memory Protection
-
- A DAMPR register is used to cover the entire region used for I/O
- (0xE0000000 - 0xFFFFFFFF). This permits the kernel to make uncached
- accesses to this region. Userspace is not permitted to access it.
-
- The DAMPR/IAMPR protection registers not in use for any other purpose are
- tiled over the top of the SDRAM such that:
-
- (1) The core kernel image is covered by as small a tile as possible
- granting only the kernel access to the underlying data, whilst
- making sure no SDRAM is actually made unavailable by this approach.
-
- (2) All other tiles are arranged to permit userspace access to the rest
- of the SDRAM.
-
- Barring point (1), there is nothing to protect kernel data against
- userspace damage - but this is uClinux.
-
-
- (*) Exceptions and Fixups
-
- Since the FR40x and FR55x CPUs that do not have full MMUs generate
- imprecise data error exceptions, there are currently no automatic fixup
- services available in uClinux. This includes misaligned memory access
- fixups.
-
- Userspace EFAULT errors can be trapped by issuing a MEMBAR instruction and
- forcing the fault to happen there.
-
- On the FR451, however, data exceptions are mostly precise, and so
- exception fixup handling is implemented as normal.
-
-
- (*) Userspace Breakpoints
-
- The ptrace() system call supports the following userspace debugging
- features:
-
- (1) Hardware assisted single step.
-
- (2) Breakpoint via the FR-V "BREAK" instruction.
-
- (3) Breakpoint via the FR-V "TIRA GR0, #1" instruction.
-
- (4) Syscall entry/exit trap.
-
- Each of the above generates a SIGTRAP.
-
-
- (*) On-Chip Serial Ports
-
- The FR-V on-chip serial ports are made available as ttyS0 and ttyS1. Note
- that if the GDB stub is compiled in, ttyS1 will not actually be available
- as it will be being used for the GDB stub.
-
- These ports can be made by:
-
- mknod /dev/ttyS0 c 4 64
- mknod /dev/ttyS1 c 4 65
-
-
- (*) Maskable Interrupts
-
- Level 15 (Non-maskable) interrupts are dealt with by the GDB stub if
- present, and cause a panic if not. If the GDB stub is present, ttyS1's
- interrupts are rated at level 15.
-
- All other interrupts are distributed over the set of available priorities
- so that no IRQs are shared where possible. The arch interrupt handling
- routines attempt to disentangle the various sources available through the
- CPU's own multiplexor, and those on off-CPU peripherals.
-
-
- (*) Accessing PCI Devices
-
- Where PCI is available, care must be taken when dealing with drivers that
- access PCI devices. PCI devices present their data in little-endian form,
- but the CPU sees it in big-endian form. The macros in asm/io.h try to get
- this right, but may not under all circumstances...
-
-
- (*) Ax88796 Ethernet Driver
-
- The MB93093 PDK board has an Ax88796 ethernet chipset (an NE2000 clone). A
- driver has been written to deal specifically with this. The driver
- provides MII services for the card.
-
- The driver can be configured by running make xconfig, and going to:
-
- (*) Network device support
- - turn on "Network device support"
- (*) Ethernet (10 or 100Mbit)
- - turn on "Ethernet (10 or 100Mbit)"
- - turn on "AX88796 NE2000 compatible chipset"
-
- The driver can be found in:
-
- drivers/net/ax88796.c
- include/asm/ax88796.h
-
-
- (*) WorkRAM Driver
-
- This driver provides a character device that permits access to the WorkRAM
- that can be found on the FR451 CPU. Each page is accessible through a
- separate minor number, thereby permitting each page to have its own
- filesystem permissions set on the device file.
-
- The device files should be:
-
- mknod /dev/frv/workram0 c 240 0
- mknod /dev/frv/workram1 c 240 1
- mknod /dev/frv/workram2 c 240 2
- ...
-
- The driver will not permit the opening of any device file that does not
- correspond to at least a partial page of WorkRAM. So the first device file
- is the only one available on the FR451. If any other CPU is detected, none
- of the devices will be openable.
-
- The devices can be accessed with read, write and llseek, and can also be
- mmapped. If they're mmapped, they will only map at the appropriate
- 0x7e8nnnnn address on linux and at the 0xfe8nnnnn address on uClinux. If
- MAP_FIXED is not specified, the appropriate address will be chosen anyway.
-
- The mappings must be MAP_SHARED not MAP_PRIVATE, and must not be
- PROT_EXEC. They must also start at file offset 0, and must not be longer
- than one page in size.
-
- This driver can be configured by running make xconfig, and going to:
-
- (*) Character devices
- - turn on "Fujitsu FR-V CPU WorkRAM support"
-
-
- (*) Dynamic data cache write mode changing
-
- It is possible to view and to change the data cache's write mode through
- the /proc/sys/frv/cache-mode file while the kernel is running. There are
- two modes available:
-
- NAME MEANING
- ===== ==========================================
- wthru Data cache is in Write-Through mode
- wback Data cache is in Write-Back/Copy-Back mode
-
- To read the cache mode:
-
- # cat /proc/sys/frv/cache-mode
- wthru
-
- To change the cache mode:
-
- # echo wback >/proc/sys/frv/cache-mode
- # cat /proc/sys/frv/cache-mode
- wback
-
-
- (*) MMU Context IDs and Pinning
-
- On MMU Linux the CPU supports the concept of a context ID in its MMU to
- make it more efficient (TLB entries are labelled with a context ID to link
- them to specific tasks).
-
- Normally once a context ID is allocated, it will remain affixed to a task
- or CLONE_VM'd group of tasks for as long as it exists. However, since the
- kernel is capable of supporting more tasks than there are possible ID
- numbers, the kernel will pass context IDs from one task to another if
- there are insufficient available.
-
- The context ID currently in use by a task can be viewed in /proc:
-
- # grep CXNR /proc/1/status
- CXNR: 1
-
- Note that kernel threads do not have a userspace context, and so will not
- show a CXNR entry in that file.
-
- Under some circumstances, however, it is desirable to pin a context ID on
- a process such that the kernel won't pass it on. This can be done by
- writing the process ID of the target process to a special file:
-
- # echo 17 >/proc/sys/frv/pin-cxnr
-
- Reading from the file will then show the context ID pinned.
-
- # cat /proc/sys/frv/pin-cxnr
- 4
-
- The context ID will remain pinned as long as any process is using that
- context, i.e.: when the all the subscribing processes have exited or
- exec'd; or when an unpinning request happens:
-
- # echo 0 >/proc/sys/frv/pin-cxnr
-
- When there isn't a pinned context, the file shows -1:
-
- # cat /proc/sys/frv/pin-cxnr
- -1
+++ /dev/null
-set remotebreak 1
-
-define _amr
-
-printf "AMRx DAMR IAMR \n"
-printf "==== ===================== =====================\n"
-printf "amr0 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x0].L,__debug_mmu.damr[0x0].P,__debug_mmu.iamr[0x0].L,__debug_mmu.iamr[0x0].P
-printf "amr1 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x1].L,__debug_mmu.damr[0x1].P,__debug_mmu.iamr[0x1].L,__debug_mmu.iamr[0x1].P
-printf "amr2 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x2].L,__debug_mmu.damr[0x2].P,__debug_mmu.iamr[0x2].L,__debug_mmu.iamr[0x2].P
-printf "amr3 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x3].L,__debug_mmu.damr[0x3].P,__debug_mmu.iamr[0x3].L,__debug_mmu.iamr[0x3].P
-printf "amr4 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x4].L,__debug_mmu.damr[0x4].P,__debug_mmu.iamr[0x4].L,__debug_mmu.iamr[0x4].P
-printf "amr5 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x5].L,__debug_mmu.damr[0x5].P,__debug_mmu.iamr[0x5].L,__debug_mmu.iamr[0x5].P
-printf "amr6 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x6].L,__debug_mmu.damr[0x6].P,__debug_mmu.iamr[0x6].L,__debug_mmu.iamr[0x6].P
-printf "amr7 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x7].L,__debug_mmu.damr[0x7].P,__debug_mmu.iamr[0x7].L,__debug_mmu.iamr[0x7].P
-
-printf "amr8 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x8].L,__debug_mmu.damr[0x8].P
-printf "amr9 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x9].L,__debug_mmu.damr[0x9].P
-printf "amr10: L:%08lx P:%08lx\n",__debug_mmu.damr[0xa].L,__debug_mmu.damr[0xa].P
-printf "amr11: L:%08lx P:%08lx\n",__debug_mmu.damr[0xb].L,__debug_mmu.damr[0xb].P
-
-end
-
-
-define _tlb
-printf "tlb[0x00]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x0].L,__debug_mmu.tlb[0x0].P,__debug_mmu.tlb[0x40+0x0].L,__debug_mmu.tlb[0x40+0x0].P
-printf "tlb[0x01]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1].L,__debug_mmu.tlb[0x1].P,__debug_mmu.tlb[0x40+0x1].L,__debug_mmu.tlb[0x40+0x1].P
-printf "tlb[0x02]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2].L,__debug_mmu.tlb[0x2].P,__debug_mmu.tlb[0x40+0x2].L,__debug_mmu.tlb[0x40+0x2].P
-printf "tlb[0x03]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3].L,__debug_mmu.tlb[0x3].P,__debug_mmu.tlb[0x40+0x3].L,__debug_mmu.tlb[0x40+0x3].P
-printf "tlb[0x04]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x4].L,__debug_mmu.tlb[0x4].P,__debug_mmu.tlb[0x40+0x4].L,__debug_mmu.tlb[0x40+0x4].P
-printf "tlb[0x05]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x5].L,__debug_mmu.tlb[0x5].P,__debug_mmu.tlb[0x40+0x5].L,__debug_mmu.tlb[0x40+0x5].P
-printf "tlb[0x06]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x6].L,__debug_mmu.tlb[0x6].P,__debug_mmu.tlb[0x40+0x6].L,__debug_mmu.tlb[0x40+0x6].P
-printf "tlb[0x07]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x7].L,__debug_mmu.tlb[0x7].P,__debug_mmu.tlb[0x40+0x7].L,__debug_mmu.tlb[0x40+0x7].P
-printf "tlb[0x08]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x8].L,__debug_mmu.tlb[0x8].P,__debug_mmu.tlb[0x40+0x8].L,__debug_mmu.tlb[0x40+0x8].P
-printf "tlb[0x09]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x9].L,__debug_mmu.tlb[0x9].P,__debug_mmu.tlb[0x40+0x9].L,__debug_mmu.tlb[0x40+0x9].P
-printf "tlb[0x0a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xa].L,__debug_mmu.tlb[0xa].P,__debug_mmu.tlb[0x40+0xa].L,__debug_mmu.tlb[0x40+0xa].P
-printf "tlb[0x0b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xb].L,__debug_mmu.tlb[0xb].P,__debug_mmu.tlb[0x40+0xb].L,__debug_mmu.tlb[0x40+0xb].P
-printf "tlb[0x0c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xc].L,__debug_mmu.tlb[0xc].P,__debug_mmu.tlb[0x40+0xc].L,__debug_mmu.tlb[0x40+0xc].P
-printf "tlb[0x0d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xd].L,__debug_mmu.tlb[0xd].P,__debug_mmu.tlb[0x40+0xd].L,__debug_mmu.tlb[0x40+0xd].P
-printf "tlb[0x0e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xe].L,__debug_mmu.tlb[0xe].P,__debug_mmu.tlb[0x40+0xe].L,__debug_mmu.tlb[0x40+0xe].P
-printf "tlb[0x0f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xf].L,__debug_mmu.tlb[0xf].P,__debug_mmu.tlb[0x40+0xf].L,__debug_mmu.tlb[0x40+0xf].P
-printf "tlb[0x10]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x10].L,__debug_mmu.tlb[0x10].P,__debug_mmu.tlb[0x40+0x10].L,__debug_mmu.tlb[0x40+0x10].P
-printf "tlb[0x11]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x11].L,__debug_mmu.tlb[0x11].P,__debug_mmu.tlb[0x40+0x11].L,__debug_mmu.tlb[0x40+0x11].P
-printf "tlb[0x12]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x12].L,__debug_mmu.tlb[0x12].P,__debug_mmu.tlb[0x40+0x12].L,__debug_mmu.tlb[0x40+0x12].P
-printf "tlb[0x13]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x13].L,__debug_mmu.tlb[0x13].P,__debug_mmu.tlb[0x40+0x13].L,__debug_mmu.tlb[0x40+0x13].P
-printf "tlb[0x14]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x14].L,__debug_mmu.tlb[0x14].P,__debug_mmu.tlb[0x40+0x14].L,__debug_mmu.tlb[0x40+0x14].P
-printf "tlb[0x15]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x15].L,__debug_mmu.tlb[0x15].P,__debug_mmu.tlb[0x40+0x15].L,__debug_mmu.tlb[0x40+0x15].P
-printf "tlb[0x16]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x16].L,__debug_mmu.tlb[0x16].P,__debug_mmu.tlb[0x40+0x16].L,__debug_mmu.tlb[0x40+0x16].P
-printf "tlb[0x17]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x17].L,__debug_mmu.tlb[0x17].P,__debug_mmu.tlb[0x40+0x17].L,__debug_mmu.tlb[0x40+0x17].P
-printf "tlb[0x18]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x18].L,__debug_mmu.tlb[0x18].P,__debug_mmu.tlb[0x40+0x18].L,__debug_mmu.tlb[0x40+0x18].P
-printf "tlb[0x19]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x19].L,__debug_mmu.tlb[0x19].P,__debug_mmu.tlb[0x40+0x19].L,__debug_mmu.tlb[0x40+0x19].P
-printf "tlb[0x1a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1a].L,__debug_mmu.tlb[0x1a].P,__debug_mmu.tlb[0x40+0x1a].L,__debug_mmu.tlb[0x40+0x1a].P
-printf "tlb[0x1b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1b].L,__debug_mmu.tlb[0x1b].P,__debug_mmu.tlb[0x40+0x1b].L,__debug_mmu.tlb[0x40+0x1b].P
-printf "tlb[0x1c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1c].L,__debug_mmu.tlb[0x1c].P,__debug_mmu.tlb[0x40+0x1c].L,__debug_mmu.tlb[0x40+0x1c].P
-printf "tlb[0x1d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1d].L,__debug_mmu.tlb[0x1d].P,__debug_mmu.tlb[0x40+0x1d].L,__debug_mmu.tlb[0x40+0x1d].P
-printf "tlb[0x1e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1e].L,__debug_mmu.tlb[0x1e].P,__debug_mmu.tlb[0x40+0x1e].L,__debug_mmu.tlb[0x40+0x1e].P
-printf "tlb[0x1f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1f].L,__debug_mmu.tlb[0x1f].P,__debug_mmu.tlb[0x40+0x1f].L,__debug_mmu.tlb[0x40+0x1f].P
-printf "tlb[0x20]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x20].L,__debug_mmu.tlb[0x20].P,__debug_mmu.tlb[0x40+0x20].L,__debug_mmu.tlb[0x40+0x20].P
-printf "tlb[0x21]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x21].L,__debug_mmu.tlb[0x21].P,__debug_mmu.tlb[0x40+0x21].L,__debug_mmu.tlb[0x40+0x21].P
-printf "tlb[0x22]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x22].L,__debug_mmu.tlb[0x22].P,__debug_mmu.tlb[0x40+0x22].L,__debug_mmu.tlb[0x40+0x22].P
-printf "tlb[0x23]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x23].L,__debug_mmu.tlb[0x23].P,__debug_mmu.tlb[0x40+0x23].L,__debug_mmu.tlb[0x40+0x23].P
-printf "tlb[0x24]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x24].L,__debug_mmu.tlb[0x24].P,__debug_mmu.tlb[0x40+0x24].L,__debug_mmu.tlb[0x40+0x24].P
-printf "tlb[0x25]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x25].L,__debug_mmu.tlb[0x25].P,__debug_mmu.tlb[0x40+0x25].L,__debug_mmu.tlb[0x40+0x25].P
-printf "tlb[0x26]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x26].L,__debug_mmu.tlb[0x26].P,__debug_mmu.tlb[0x40+0x26].L,__debug_mmu.tlb[0x40+0x26].P
-printf "tlb[0x27]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x27].L,__debug_mmu.tlb[0x27].P,__debug_mmu.tlb[0x40+0x27].L,__debug_mmu.tlb[0x40+0x27].P
-printf "tlb[0x28]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x28].L,__debug_mmu.tlb[0x28].P,__debug_mmu.tlb[0x40+0x28].L,__debug_mmu.tlb[0x40+0x28].P
-printf "tlb[0x29]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x29].L,__debug_mmu.tlb[0x29].P,__debug_mmu.tlb[0x40+0x29].L,__debug_mmu.tlb[0x40+0x29].P
-printf "tlb[0x2a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2a].L,__debug_mmu.tlb[0x2a].P,__debug_mmu.tlb[0x40+0x2a].L,__debug_mmu.tlb[0x40+0x2a].P
-printf "tlb[0x2b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2b].L,__debug_mmu.tlb[0x2b].P,__debug_mmu.tlb[0x40+0x2b].L,__debug_mmu.tlb[0x40+0x2b].P
-printf "tlb[0x2c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2c].L,__debug_mmu.tlb[0x2c].P,__debug_mmu.tlb[0x40+0x2c].L,__debug_mmu.tlb[0x40+0x2c].P
-printf "tlb[0x2d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2d].L,__debug_mmu.tlb[0x2d].P,__debug_mmu.tlb[0x40+0x2d].L,__debug_mmu.tlb[0x40+0x2d].P
-printf "tlb[0x2e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2e].L,__debug_mmu.tlb[0x2e].P,__debug_mmu.tlb[0x40+0x2e].L,__debug_mmu.tlb[0x40+0x2e].P
-printf "tlb[0x2f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2f].L,__debug_mmu.tlb[0x2f].P,__debug_mmu.tlb[0x40+0x2f].L,__debug_mmu.tlb[0x40+0x2f].P
-printf "tlb[0x30]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x30].L,__debug_mmu.tlb[0x30].P,__debug_mmu.tlb[0x40+0x30].L,__debug_mmu.tlb[0x40+0x30].P
-printf "tlb[0x31]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x31].L,__debug_mmu.tlb[0x31].P,__debug_mmu.tlb[0x40+0x31].L,__debug_mmu.tlb[0x40+0x31].P
-printf "tlb[0x32]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x32].L,__debug_mmu.tlb[0x32].P,__debug_mmu.tlb[0x40+0x32].L,__debug_mmu.tlb[0x40+0x32].P
-printf "tlb[0x33]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x33].L,__debug_mmu.tlb[0x33].P,__debug_mmu.tlb[0x40+0x33].L,__debug_mmu.tlb[0x40+0x33].P
-printf "tlb[0x34]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x34].L,__debug_mmu.tlb[0x34].P,__debug_mmu.tlb[0x40+0x34].L,__debug_mmu.tlb[0x40+0x34].P
-printf "tlb[0x35]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x35].L,__debug_mmu.tlb[0x35].P,__debug_mmu.tlb[0x40+0x35].L,__debug_mmu.tlb[0x40+0x35].P
-printf "tlb[0x36]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x36].L,__debug_mmu.tlb[0x36].P,__debug_mmu.tlb[0x40+0x36].L,__debug_mmu.tlb[0x40+0x36].P
-printf "tlb[0x37]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x37].L,__debug_mmu.tlb[0x37].P,__debug_mmu.tlb[0x40+0x37].L,__debug_mmu.tlb[0x40+0x37].P
-printf "tlb[0x38]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x38].L,__debug_mmu.tlb[0x38].P,__debug_mmu.tlb[0x40+0x38].L,__debug_mmu.tlb[0x40+0x38].P
-printf "tlb[0x39]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x39].L,__debug_mmu.tlb[0x39].P,__debug_mmu.tlb[0x40+0x39].L,__debug_mmu.tlb[0x40+0x39].P
-printf "tlb[0x3a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3a].L,__debug_mmu.tlb[0x3a].P,__debug_mmu.tlb[0x40+0x3a].L,__debug_mmu.tlb[0x40+0x3a].P
-printf "tlb[0x3b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3b].L,__debug_mmu.tlb[0x3b].P,__debug_mmu.tlb[0x40+0x3b].L,__debug_mmu.tlb[0x40+0x3b].P
-printf "tlb[0x3c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3c].L,__debug_mmu.tlb[0x3c].P,__debug_mmu.tlb[0x40+0x3c].L,__debug_mmu.tlb[0x40+0x3c].P
-printf "tlb[0x3d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3d].L,__debug_mmu.tlb[0x3d].P,__debug_mmu.tlb[0x40+0x3d].L,__debug_mmu.tlb[0x40+0x3d].P
-printf "tlb[0x3e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3e].L,__debug_mmu.tlb[0x3e].P,__debug_mmu.tlb[0x40+0x3e].L,__debug_mmu.tlb[0x40+0x3e].P
-printf "tlb[0x3f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3f].L,__debug_mmu.tlb[0x3f].P,__debug_mmu.tlb[0x40+0x3f].L,__debug_mmu.tlb[0x40+0x3f].P
-end
-
-
-define _pgd
-p (pgd_t[0x40])*(pgd_t*)(__debug_mmu.damr[0x3].L)
-end
-
-define _ptd_i
-p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x4].L)
-end
-
-define _ptd_d
-p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x5].L)
-end
+++ /dev/null
- ====================
- DEBUGGING FR-V LINUX
- ====================
-
-
-The kernel contains a GDB stub that talks GDB remote protocol across a serial
-port. This permits GDB to single step through the kernel, set breakpoints and
-trap exceptions that happen in kernel space and interrupt execution. It also
-permits the NMI interrupt button or serial port events to jump the kernel into
-the debugger.
-
-On the CPUs that have on-chip UARTs (FR400, FR403, FR405, FR555), the
-GDB stub hijacks a serial port for its own purposes, and makes it
-generate level 15 interrupts (NMI). The kernel proper cannot see the serial
-port in question under these conditions.
-
-On the MB93091-VDK CPU boards, the GDB stub uses UART1, which would otherwise
-be /dev/ttyS1. On the MB93093-PDK, the GDB stub uses UART0. Therefore, on the
-PDK there is no externally accessible serial port and the serial port to
-which the touch screen is attached becomes /dev/ttyS0.
-
-Note that the GDB stub runs entirely within CPU debug mode, and so should not
-incur any exceptions or interrupts whilst it is active. In particular, note
-that the clock will lose time since it is implemented in software.
-
-
-==================
-KERNEL PREPARATION
-==================
-
-Firstly, a debuggable kernel must be built. To do this, unpack the kernel tree
-and copy the configuration that you wish to use to .config. Then reconfigure
-the following things on the "Kernel Hacking" tab:
-
- (*) "Include debugging information"
-
- Set this to "Y". This causes all C and Assembly files to be compiled
- to include debugging information.
-
- (*) "In-kernel GDB stub"
-
- Set this to "Y". This causes the GDB stub to be compiled into the
- kernel.
-
- (*) "Immediate activation"
-
- Set this to "Y" if you want the GDB stub to activate as soon as possible
- and wait for GDB to connect. This allows you to start tracing right from
- the beginning of start_kernel() in init/main.c.
-
- (*) "Console through GDB stub"
-
- Set this to "Y" if you wish to be able to use "console=gdb0" on the
- command line. That tells the kernel to pass system console messages to
- GDB (which then prints them on its standard output). This is useful when
- debugging the serial drivers that'd otherwise be used to pass console
- messages to the outside world.
-
-Then build as usual, download to the board and execute. Note that if
-"Immediate activation" was selected, then the kernel will wait for GDB to
-attach. If not, then the kernel will boot immediately and GDB will have to
-interrupt it or wait for an exception to occur before doing anything with
-the kernel.
-
-
-=========================
-KERNEL DEBUGGING WITH GDB
-=========================
-
-Set the serial port on the computer that's going to run GDB to the appropriate
-baud rate. Assuming the board's debug port is connected to ttyS0/COM1 on the
-computer doing the debugging:
-
- stty -F /dev/ttyS0 115200
-
-Then start GDB in the base of the kernel tree:
-
- frv-uclinux-gdb linux [uClinux]
-
-Or:
-
- frv-uclinux-gdb vmlinux [MMU linux]
-
-When the prompt appears:
-
- GNU gdb frv-031024
- Copyright 2003 Free Software Foundation, Inc.
- GDB is free software, covered by the GNU General Public License, and you are
- welcome to change it and/or distribute copies of it under certain conditions.
- Type "show copying" to see the conditions.
- There is absolutely no warranty for GDB. Type "show warranty" for details.
- This GDB was configured as "--host=i686-pc-linux-gnu --target=frv-uclinux"...
- (gdb)
-
-Attach to the board like this:
-
- (gdb) target remote /dev/ttyS0
- Remote debugging using /dev/ttyS0
- start_kernel () at init/main.c:395
- (gdb)
-
-This should show the appropriate lines from the source too. The kernel can
-then be debugged almost as if it's any other program.
-
-
-===============================
-INTERRUPTING THE RUNNING KERNEL
-===============================
-
-The kernel can be interrupted whilst it is running, causing a jump back to the
-GDB stub and the debugger:
-
- (*) Pressing Ctrl-C in GDB. This will cause GDB to try and interrupt the
- kernel by sending an RS232 BREAK over the serial line to the GDB
- stub. This will (mostly) immediately interrupt the kernel and return it
- to the debugger.
-
- (*) Pressing the NMI button on the board will also cause a jump into the
- debugger.
-
- (*) Setting a software breakpoint. This sets a break instruction at the
- desired location which the GDB stub then traps the exception for.
-
- (*) Setting a hardware breakpoint. The GDB stub is capable of using the IBAR
- and DBAR registers to assist debugging.
-
-Furthermore, the GDB stub will intercept a number of exceptions automatically
-if they are caused by kernel execution. It will also intercept BUG() macro
-invocation.
-
+++ /dev/null
- =================================
- INTERNAL KERNEL ABI FOR FR-V ARCH
- =================================
-
-The internal FRV kernel ABI is not quite the same as the userspace ABI. A
-number of the registers are used for special purposed, and the ABI is not
-consistent between modules vs core, and MMU vs no-MMU.
-
-This partly stems from the fact that FRV CPUs do not have a separate
-supervisor stack pointer, and most of them do not have any scratch
-registers, thus requiring at least one general purpose register to be
-clobbered in such an event. Also, within the kernel core, it is possible to
-simply jump or call directly between functions using a relative offset.
-This cannot be extended to modules for the displacement is likely to be too
-far. Thus in modules the address of a function to call must be calculated
-in a register and then used, requiring two extra instructions.
-
-This document has the following sections:
-
- (*) System call register ABI
- (*) CPU operating modes
- (*) Internal kernel-mode register ABI
- (*) Internal debug-mode register ABI
- (*) Virtual interrupt handling
-
-
-========================
-SYSTEM CALL REGISTER ABI
-========================
-
-When a system call is made, the following registers are effective:
-
- REGISTERS CALL RETURN
- =============== ======================= =======================
- GR7 System call number Preserved
- GR8 Syscall arg #1 Return value
- GR9-GR13 Syscall arg #2-6 Preserved
-
-
-===================
-CPU OPERATING MODES
-===================
-
-The FR-V CPU has three basic operating modes. In order of increasing
-capability:
-
- (1) User mode.
-
- Basic userspace running mode.
-
- (2) Kernel mode.
-
- Normal kernel mode. There are many additional control registers
- available that may be accessed in this mode, in addition to all the
- stuff available to user mode. This has two submodes:
-
- (a) Exceptions enabled (PSR.T == 1).
-
- Exceptions will invoke the appropriate normal kernel mode
- handler. On entry to the handler, the PSR.T bit will be cleared.
-
- (b) Exceptions disabled (PSR.T == 0).
-
- No exceptions or interrupts may happen. Any mandatory exceptions
- will cause the CPU to halt unless the CPU is told to jump into
- debug mode instead.
-
- (3) Debug mode.
-
- No exceptions may happen in this mode. Memory protection and
- management exceptions will be flagged for later consideration, but
- the exception handler won't be invoked. Debugging traps such as
- hardware breakpoints and watchpoints will be ignored. This mode is
- entered only by debugging events obtained from the other two modes.
-
- All kernel mode registers may be accessed, plus a few extra debugging
- specific registers.
-
-
-=================================
-INTERNAL KERNEL-MODE REGISTER ABI
-=================================
-
-There are a number of permanent register assignments that are set up by
-entry.S in the exception prologue. Note that there is a complete set of
-exception prologues for each of user->kernel transition and kernel->kernel
-transition. There are also user->debug and kernel->debug mode transition
-prologues.
-
-
- REGISTER FLAVOUR USE
- =============== ======= ==============================================
- GR1 Supervisor stack pointer
- GR15 Current thread info pointer
- GR16 GP-Rel base register for small data
- GR28 Current exception frame pointer (__frame)
- GR29 Current task pointer (current)
- GR30 Destroyed by kernel mode entry
- GR31 NOMMU Destroyed by debug mode entry
- GR31 MMU Destroyed by TLB miss kernel mode entry
- CCR.ICC2 Virtual interrupt disablement tracking
- CCCR.CC3 Cleared by exception prologue
- (atomic op emulation)
- SCR0 MMU See mmu-layout.txt.
- SCR1 MMU See mmu-layout.txt.
- SCR2 MMU Save for EAR0 (destroyed by icache insns
- in debug mode)
- SCR3 MMU Save for GR31 during debug exceptions
- DAMR/IAMR NOMMU Fixed memory protection layout.
- DAMR/IAMR MMU See mmu-layout.txt.
-
-
-Certain registers are also used or modified across function calls:
-
- REGISTER CALL RETURN
- =============== =============================== ======================
- GR0 Fixed Zero -
- GR2 Function call frame pointer
- GR3 Special Preserved
- GR3-GR7 - Clobbered
- GR8 Function call arg #1 Return value
- (or clobbered)
- GR9 Function call arg #2 Return value MSW
- (or clobbered)
- GR10-GR13 Function call arg #3-#6 Clobbered
- GR14 - Clobbered
- GR15-GR16 Special Preserved
- GR17-GR27 - Preserved
- GR28-GR31 Special Only accessed
- explicitly
- LR Return address after CALL Clobbered
- CCR/CCCR - Mostly Clobbered
-
-
-================================
-INTERNAL DEBUG-MODE REGISTER ABI
-================================
-
-This is the same as the kernel-mode register ABI for functions calls. The
-difference is that in debug-mode there's a different stack and a different
-exception frame. Almost all the global registers from kernel-mode
-(including the stack pointer) may be changed.
-
- REGISTER FLAVOUR USE
- =============== ======= ==============================================
- GR1 Debug stack pointer
- GR16 GP-Rel base register for small data
- GR31 Current debug exception frame pointer
- (__debug_frame)
- SCR3 MMU Saved value of GR31
-
-
-Note that debug mode is able to interfere with the kernel's emulated atomic
-ops, so it must be exceedingly careful not to do any that would interact
-with the main kernel in this regard. Hence the debug mode code (gdbstub) is
-almost completely self-contained. The only external code used is the
-sprintf family of functions.
-
-Furthermore, break.S is so complicated because single-step mode does not
-switch off on entry to an exception. That means unless manually disabled,
-single-stepping will blithely go on stepping into things like interrupts.
-See gdbstub.txt for more information.
-
-
-==========================
-VIRTUAL INTERRUPT HANDLING
-==========================
-
-Because accesses to the PSR is so slow, and to disable interrupts we have
-to access it twice (once to read and once to write), we don't actually
-disable interrupts at all if we don't have to. What we do instead is use
-the ICC2 condition code flags to note virtual disablement, such that if we
-then do take an interrupt, we note the flag, really disable interrupts, set
-another flag and resume execution at the point the interrupt happened.
-Setting condition flags as a side effect of an arithmetic or logical
-instruction is really fast. This use of the ICC2 only occurs within the
-kernel - it does not affect userspace.
-
-The flags we use are:
-
- (*) CCR.ICC2.Z [Zero flag]
-
- Set to virtually disable interrupts, clear when interrupts are
- virtually enabled. Can be modified by logical instructions without
- affecting the Carry flag.
-
- (*) CCR.ICC2.C [Carry flag]
-
- Clear to indicate hardware interrupts are really disabled, set otherwise.
-
-
-What happens is this:
-
- (1) Normal kernel-mode operation.
-
- ICC2.Z is 0, ICC2.C is 1.
-
- (2) An interrupt occurs. The exception prologue examines ICC2.Z and
- determines that nothing needs doing. This is done simply with an
- unlikely BEQ instruction.
-
- (3) The interrupts are disabled (local_irq_disable)
-
- ICC2.Z is set to 1.
-
- (4) If interrupts were then re-enabled (local_irq_enable):
-
- ICC2.Z would be set to 0.
-
- A TIHI #2 instruction (trap #2 if condition HI - Z==0 && C==0) would
- be used to trap if interrupts were now virtually enabled, but
- physically disabled - which they're not, so the trap isn't taken. The
- kernel would then be back to state (1).
-
- (5) An interrupt occurs. The exception prologue examines ICC2.Z and
- determines that the interrupt shouldn't actually have happened. It
- jumps aside, and there disabled interrupts by setting PSR.PIL to 14
- and then it clears ICC2.C.
-
- (6) If interrupts were then saved and disabled again (local_irq_save):
-
- ICC2.Z would be shifted into the save variable and masked off
- (giving a 1).
-
- ICC2.Z would then be set to 1 (thus unchanged), and ICC2.C would be
- unaffected (ie: 0).
-
- (7) If interrupts were then restored from state (6) (local_irq_restore):
-
- ICC2.Z would be set to indicate the result of XOR'ing the saved
- value (ie: 1) with 1, which gives a result of 0 - thus leaving
- ICC2.Z set.
-
- ICC2.C would remain unaffected (ie: 0).
-
- A TIHI #2 instruction would be used to again assay the current state,
- but this would do nothing as Z==1.
-
- (8) If interrupts were then enabled (local_irq_enable):
-
- ICC2.Z would be cleared. ICC2.C would be left unaffected. Both
- flags would now be 0.
-
- A TIHI #2 instruction again issued to assay the current state would
- then trap as both Z==0 [interrupts virtually enabled] and C==0
- [interrupts really disabled] would then be true.
-
- (9) The trap #2 handler would simply enable hardware interrupts
- (set PSR.PIL to 0), set ICC2.C to 1 and return.
-
-(10) Immediately upon returning, the pending interrupt would be taken.
-
-(11) The interrupt handler would take the path of actually processing the
- interrupt (ICC2.Z is clear, BEQ fails as per step (2)).
-
-(12) The interrupt handler would then set ICC2.C to 1 since hardware
- interrupts are definitely enabled - or else the kernel wouldn't be here.
-
-(13) On return from the interrupt handler, things would be back to state (1).
-
-This trap (#2) is only available in kernel mode. In user mode it will
-result in SIGILL.
+++ /dev/null
- =================================
- FR451 MMU LINUX MEMORY MANAGEMENT
- =================================
-
-============
-MMU HARDWARE
-============
-
-FR451 MMU Linux puts the MMU into EDAT mode whilst running. This means that it uses both the SAT
-registers and the DAT TLB to perform address translation.
-
-There are 8 IAMLR/IAMPR register pairs and 16 DAMLR/DAMPR register pairs for SAT mode.
-
-In DAT mode, there is also a TLB organised in cache format as 64 lines x 2 ways. Each line spans a
-16KB range of addresses, but can match a larger region.
-
-
-===========================
-MEMORY MANAGEMENT REGISTERS
-===========================
-
-Certain control registers are used by the kernel memory management routines:
-
- REGISTERS USAGE
- ====================== ==================================================
- IAMR0, DAMR0 Kernel image and data mappings
- IAMR1, DAMR1 First-chance TLB lookup mapping
- DAMR2 Page attachment for cache flush by page
- DAMR3 Current PGD mapping
- SCR0, DAMR4 Instruction TLB PGE/PTD cache
- SCR1, DAMR5 Data TLB PGE/PTD cache
- DAMR6-10 kmap_atomic() mappings
- DAMR11 I/O mapping
- CXNR mm_struct context ID
- TTBR Page directory (PGD) pointer (physical address)
-
-
-=====================
-GENERAL MEMORY LAYOUT
-=====================
-
-The physical memory layout is as follows:
-
- PHYSICAL ADDRESS CONTROLLER DEVICE
- =================== ============== =======================================
- 00000000 - BFFFFFFF SDRAM SDRAM area
- E0000000 - EFFFFFFF L-BUS CS2# VDK SLBUS/PCI window
- F0000000 - F0FFFFFF L-BUS CS5# MB93493 CSC area (DAV daughter board)
- F1000000 - F1FFFFFF L-BUS CS7# (CB70 CPU-card PCMCIA port I/O space)
- FC000000 - FC0FFFFF L-BUS CS1# VDK MB86943 config space
- FC100000 - FC1FFFFF L-BUS CS6# DM9000 NIC I/O space
- FC200000 - FC2FFFFF L-BUS CS3# MB93493 CSR area (DAV daughter board)
- FD000000 - FDFFFFFF L-BUS CS4# (CB70 CPU-card extra flash space)
- FE000000 - FEFFFFFF Internal CPU peripherals
- FF000000 - FF1FFFFF L-BUS CS0# Flash 1
- FF200000 - FF3FFFFF L-BUS CS0# Flash 2
- FFC00000 - FFC0001F L-BUS CS0# FPGA
-
-The virtual memory layout is:
-
- VIRTUAL ADDRESS PHYSICAL TRANSLATOR FLAGS SIZE OCCUPATION
- ================= ======== ============== ======= ======= ===================================
- 00004000-BFFFFFFF various TLB,xAMR1 D-N-??V 3GB Userspace
- C0000000-CFFFFFFF 00000000 xAMPR0 -L-S--V 256MB Kernel image and data
- D0000000-D7FFFFFF various TLB,xAMR1 D-NS??V 128MB vmalloc area
- D8000000-DBFFFFFF various TLB,xAMR1 D-NS??V 64MB kmap() area
- DC000000-DCFFFFFF various TLB 1MB Secondary kmap_atomic() frame
- DD000000-DD27FFFF various DAMR 160KB Primary kmap_atomic() frame
- DD040000 DAMR2/IAMR2 -L-S--V page Page cache flush attachment point
- DD080000 DAMR3 -L-SC-V page Page Directory (PGD)
- DD0C0000 DAMR4 -L-SC-V page Cached insn TLB Page Table lookup
- DD100000 DAMR5 -L-SC-V page Cached data TLB Page Table lookup
- DD140000 DAMR6 -L-S--V page kmap_atomic(KM_BOUNCE_READ)
- DD180000 DAMR7 -L-S--V page kmap_atomic(KM_SKB_SUNRPC_DATA)
- DD1C0000 DAMR8 -L-S--V page kmap_atomic(KM_SKB_DATA_SOFTIRQ)
- DD200000 DAMR9 -L-S--V page kmap_atomic(KM_USER0)
- DD240000 DAMR10 -L-S--V page kmap_atomic(KM_USER1)
- E0000000-FFFFFFFF E0000000 DAMR11 -L-SC-V 512MB I/O region
-
-IAMPR1 and DAMPR1 are used as an extension to the TLB.
-
-
-====================
-KMAP AND KMAP_ATOMIC
-====================
-
-To access pages in the page cache (which may not be directly accessible if highmem is available),
-the kernel calls kmap(), does the access and then calls kunmap(); or it calls kmap_atomic(), does
-the access and then calls kunmap_atomic().
-
-kmap() creates an attachment between an arbitrary inaccessible page and a range of virtual
-addresses by installing a PTE in a special page table. The kernel can then access this page as it
-wills. When it's finished, the kernel calls kunmap() to clear the PTE.
-
-kmap_atomic() does something slightly different. In the interests of speed, it chooses one of two
-strategies:
-
- (1) If possible, kmap_atomic() attaches the requested page to one of DAMPR5 through DAMPR10
- register pairs; and the matching kunmap_atomic() clears the DAMPR. This makes high memory
- support really fast as there's no need to flush the TLB or modify the page tables. The DAMLR
- registers being used for this are preset during boot and don't change over the lifetime of the
- process. There's a direct mapping between the first few kmap_atomic() types, DAMR number and
- virtual address slot.
-
- However, there are more kmap_atomic() types defined than there are DAMR registers available,
- so we fall back to:
-
- (2) kmap_atomic() uses a slot in the secondary frame (determined by the type parameter), and then
- locks an entry in the TLB to translate that slot to the specified page. The number of slots is
- obviously limited, and their positions are controlled such that each slot is matched by a
- different line in the TLB. kunmap() ejects the entry from the TLB.
-
-Note that the first three kmap atomic types are really just declared as placeholders. The DAMPR
-registers involved are actually modified directly.
-
-Also note that kmap() itself may sleep, kmap_atomic() may never sleep and both always succeed;
-furthermore, a driver using kmap() may sleep before calling kunmap(), but may not sleep before
-calling kunmap_atomic() if it had previously called kmap_atomic().
-
-
-===============================
-USING MORE THAN 256MB OF MEMORY
-===============================
-
-The kernel cannot access more than 256MB of memory directly. The physical layout, however, permits
-up to 3GB of SDRAM (possibly 3.25GB) to be made available. By using CONFIG_HIGHMEM, the kernel can
-allow userspace (by way of page tables) and itself (by way of kmap) to deal with the memory
-allocation.
-
-External devices can, of course, still DMA to and from all of the SDRAM, even if the kernel can't
-see it directly. The kernel translates page references into real addresses for communicating to the
-devices.
-
-
-===================
-PAGE TABLE TOPOLOGY
-===================
-
-The page tables are arranged in 2-layer format. There is a middle layer (PMD) that would be used in
-3-layer format tables but that is folded into the top layer (PGD) and so consumes no extra memory
-or processing power.
-
- +------+ PGD PMD
- | TTBR |--->+-------------------+
- +------+ | | : STE |
- | PGE0 | PME0 : STE |
- | | : STE |
- +-------------------+ Page Table
- | | : STE -------------->+--------+ +0x0000
- | PGE1 | PME0 : STE -----------+ | PTE0 |
- | | : STE -------+ | +--------+
- +-------------------+ | | | PTE63 |
- | | : STE | | +-->+--------+ +0x0100
- | PGE2 | PME0 : STE | | | PTE64 |
- | | : STE | | +--------+
- +-------------------+ | | PTE127 |
- | | : STE | +------>+--------+ +0x0200
- | PGE3 | PME0 : STE | | PTE128 |
- | | : STE | +--------+
- +-------------------+ | PTE191 |
- +--------+ +0x0300
-
-Each Page Directory (PGD) is 16KB (page size) in size and is divided into 64 entries (PGEs). Each
-PGE contains one Page Mid Directory (PMD).
-
-Each PMD is 256 bytes in size and contains a single entry (PME). Each PME holds 64 FR451 MMU
-segment table entries of 4 bytes apiece. Each PME "points to" a page table. In practice, each STE
-points to a subset of the page table, the first to PT+0x0000, the second to PT+0x0100, the third to
-PT+0x200, and so on.
-
-Each PGE and PME covers 64MB of the total virtual address space.
-
-Each Page Table (PTD) is 16KB (page size) in size, and is divided into 4096 entries (PTEs). Each
-entry can point to one 16KB page. In practice, each Linux page table is subdivided into 64 FR451
-MMU page tables. But they are all grouped together to make management easier, in particular rmap
-support is then trivial.
-
-Grouping page tables in this fashion makes PGE caching in SCR0/SCR1 more efficient because the
-coverage of the cached item is greater.
-
-Page tables for the vmalloc area are allocated at boot time and shared between all mm_structs.
-
-
-=================
-USER SPACE LAYOUT
-=================
-
-For MMU capable Linux, the regions userspace code are allowed to access are kept entirely separate
-from those dedicated to the kernel:
-
- VIRTUAL ADDRESS SIZE PURPOSE
- ================= ===== ===================================
- 00000000-00003fff 4KB NULL pointer access trap
- 00004000-01ffffff ~32MB lower mmap space (grows up)
- 02000000-021fffff 2MB Stack space (grows down from top)
- 02200000-nnnnnnnn Executable mapping
- nnnnnnnn- brk space (grows up)
- -bfffffff upper mmap space (grows down)
-
-This is so arranged so as to make best use of the 16KB page tables and the way in which PGEs/PMEs
-are cached by the TLB handler. The lower mmap space is filled first, and then the upper mmap space
-is filled.
-
-
-===============================
-GDB-STUB MMU DEBUGGING SERVICES
-===============================
-
-The gdb-stub included in this kernel provides a number of services to aid in the debugging of MMU
-related kernel services:
-
- (*) Every time the kernel stops, certain state information is dumped into __debug_mmu. This
- variable is defined in arch/frv/kernel/gdb-stub.c. Note that the gdbinit file in this
- directory has some useful macros for dealing with this.
-
- (*) __debug_mmu.tlb[]
-
- This receives the current TLB contents. This can be viewed with the _tlb GDB macro:
-
- (gdb) _tlb
- tlb[0x00]: 01000005 00718203 01000002 00718203
- tlb[0x01]: 01004002 006d4201 01004005 006d4203
- tlb[0x02]: 01008002 006d0201 01008006 00004200
- tlb[0x03]: 0100c006 007f4202 0100c002 0064c202
- tlb[0x04]: 01110005 00774201 01110002 00774201
- tlb[0x05]: 01114005 00770201 01114002 00770201
- tlb[0x06]: 01118002 0076c201 01118005 0076c201
- ...
- tlb[0x3d]: 010f4002 00790200 001f4002 0054ca02
- tlb[0x3e]: 010f8005 0078c201 010f8002 0078c201
- tlb[0x3f]: 001fc002 0056ca01 001fc005 00538a01
-
- (*) __debug_mmu.iamr[]
- (*) __debug_mmu.damr[]
-
- These receive the current IAMR and DAMR contents. These can be viewed with the _amr
- GDB macro:
-
- (gdb) _amr
- AMRx DAMR IAMR
- ==== ===================== =====================
- amr0 : L:c0000000 P:00000cb9 : L:c0000000 P:000004b9
- amr1 : L:01070005 P:006f9203 : L:0102c005 P:006a1201
- amr2 : L:d8d00000 P:00000000 : L:d8d00000 P:00000000
- amr3 : L:d8d04000 P:00534c0d : L:00000000 P:00000000
- amr4 : L:d8d08000 P:00554c0d : L:00000000 P:00000000
- amr5 : L:d8d0c000 P:00554c0d : L:00000000 P:00000000
- amr6 : L:d8d10000 P:00000000 : L:00000000 P:00000000
- amr7 : L:d8d14000 P:00000000 : L:00000000 P:00000000
- amr8 : L:d8d18000 P:00000000
- amr9 : L:d8d1c000 P:00000000
- amr10: L:d8d20000 P:00000000
- amr11: L:e0000000 P:e0000ccd
-
- (*) The current task's page directory is bound to DAMR3.
-
- This can be viewed with the _pgd GDB macro:
-
- (gdb) _pgd
- $3 = {{pge = {{ste = {0x554001, 0x554101, 0x554201, 0x554301, 0x554401,
- 0x554501, 0x554601, 0x554701, 0x554801, 0x554901, 0x554a01,
- 0x554b01, 0x554c01, 0x554d01, 0x554e01, 0x554f01, 0x555001,
- 0x555101, 0x555201, 0x555301, 0x555401, 0x555501, 0x555601,
- 0x555701, 0x555801, 0x555901, 0x555a01, 0x555b01, 0x555c01,
- 0x555d01, 0x555e01, 0x555f01, 0x556001, 0x556101, 0x556201,
- 0x556301, 0x556401, 0x556501, 0x556601, 0x556701, 0x556801,
- 0x556901, 0x556a01, 0x556b01, 0x556c01, 0x556d01, 0x556e01,
- 0x556f01, 0x557001, 0x557101, 0x557201, 0x557301, 0x557401,
- 0x557501, 0x557601, 0x557701, 0x557801, 0x557901, 0x557a01,
- 0x557b01, 0x557c01, 0x557d01, 0x557e01, 0x557f01}}}}, {pge = {{
- ste = {0x0 <repeats 64 times>}}}} <repeats 51 times>, {pge = {{ste = {
- 0x248001, 0x248101, 0x248201, 0x248301, 0x248401, 0x248501,
- 0x248601, 0x248701, 0x248801, 0x248901, 0x248a01, 0x248b01,
- 0x248c01, 0x248d01, 0x248e01, 0x248f01, 0x249001, 0x249101,
- 0x249201, 0x249301, 0x249401, 0x249501, 0x249601, 0x249701,
- 0x249801, 0x249901, 0x249a01, 0x249b01, 0x249c01, 0x249d01,
- 0x249e01, 0x249f01, 0x24a001, 0x24a101, 0x24a201, 0x24a301,
- 0x24a401, 0x24a501, 0x24a601, 0x24a701, 0x24a801, 0x24a901,
- 0x24aa01, 0x24ab01, 0x24ac01, 0x24ad01, 0x24ae01, 0x24af01,
- 0x24b001, 0x24b101, 0x24b201, 0x24b301, 0x24b401, 0x24b501,
- 0x24b601, 0x24b701, 0x24b801, 0x24b901, 0x24ba01, 0x24bb01,
- 0x24bc01, 0x24bd01, 0x24be01, 0x24bf01}}}}, {pge = {{ste = {
- 0x0 <repeats 64 times>}}}} <repeats 11 times>}
-
- (*) The PTD last used by the instruction TLB miss handler is attached to DAMR4.
- (*) The PTD last used by the data TLB miss handler is attached to DAMR5.
-
- These can be viewed with the _ptd_i and _ptd_d GDB macros:
-
- (gdb) _ptd_d
- $5 = {{pte = 0x0} <repeats 127 times>, {pte = 0x539b01}, {
- pte = 0x0} <repeats 896 times>, {pte = 0x719303}, {pte = 0x6d5303}, {
- pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
- pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x6a1303}, {
- pte = 0x0} <repeats 12 times>, {pte = 0x709303}, {pte = 0x0}, {pte = 0x0},
- {pte = 0x6fd303}, {pte = 0x6f9303}, {pte = 0x6f5303}, {pte = 0x0}, {
- pte = 0x6ed303}, {pte = 0x531b01}, {pte = 0x50db01}, {
- pte = 0x0} <repeats 13 times>, {pte = 0x5303}, {pte = 0x7f5303}, {
- pte = 0x509b01}, {pte = 0x505b01}, {pte = 0x7c9303}, {pte = 0x7b9303}, {
- pte = 0x7b5303}, {pte = 0x7b1303}, {pte = 0x7ad303}, {pte = 0x0}, {
- pte = 0x0}, {pte = 0x7a1303}, {pte = 0x0}, {pte = 0x795303}, {pte = 0x0}, {
- pte = 0x78d303}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
- pte = 0x0}, {pte = 0x775303}, {pte = 0x771303}, {pte = 0x76d303}, {
- pte = 0x0}, {pte = 0x765303}, {pte = 0x7c5303}, {pte = 0x501b01}, {
- pte = 0x4f1b01}, {pte = 0x4edb01}, {pte = 0x0}, {pte = 0x4f9b01}, {
- pte = 0x4fdb01}, {pte = 0x0} <repeats 2992 times>}
disk with the desired initrd content, cd to that directory, and run (as an
example):
-find . | cpio --quiet -c -o | gzip -9 -n > /boot/imagefile.img
+find . | cpio --quiet -H newc -o | gzip -9 -n > /boot/imagefile.img
Examining the contents of an existing image file is just as simple:
1 will print _a lot_ more information - normally
only useful to kernel developers.
- decnet= [HW,NET]
+ decnet.addr= [HW,NET]
Format: <area>[,<node>]
See also Documentation/networking/decnet.txt.
ramdisk_size= [RAM] Sizes of RAM disks in kilobytes
See Documentation/ramdisk.txt.
- rcu.blimit= [KNL,BOOT] Set maximum number of finished
- RCU callbacks to process in one batch.
+ rcupdate.blimit= [KNL,BOOT]
+ Set maximum number of finished RCU callbacks to process
+ in one batch.
- rcu.qhimark= [KNL,BOOT] Set threshold of queued
+ rcupdate.qhimark= [KNL,BOOT]
+ Set threshold of queued
RCU callbacks over which batch limiting is disabled.
- rcu.qlowmark= [KNL,BOOT] Set threshold of queued
- RCU callbacks below which batch limiting is re-enabled.
+ rcupdate.qlowmark= [KNL,BOOT]
+ Set threshold of queued RCU callbacks below which
+ batch limiting is re-enabled.
rdinit= [KNL]
Format: <full_path>
st= [HW,SCSI] SCSI tape parameters (buffers, etc.)
See Documentation/scsi/st.txt.
- st0x= [HW,SCSI]
- See header of drivers/scsi/seagate.c.
-
sti= [PARISC,HW]
Format: <num>
Set the STI (builtin display/keyboard on the HP-PARISC
tipar.delay= [HW,PPT]
Set inter-bit delay in microseconds (default 10).
- tmc8xx= [HW,SCSI]
- See header of drivers/scsi/seagate.c.
-
tmscsim= [HW,SCSI]
See comment before function dc390_setup() in
drivers/scsi/tmscsim.c.
The kernel command line takes options looking like the following:
- decnet=1,2
+ decnet.addr=1,2
the two numbers are the node address 1,2 = 1.2 For 2.2.xx kernels
and early 2.3.xx kernels, you must use a comma when specifying the
+++ /dev/null
-To set up SMP
-
-Configure the kernel and answer Y to CONFIG_SMP.
-
-If you are using LILO, it is handy to have both SMP and non-SMP
-kernel images on hand. Edit /etc/lilo.conf to create an entry
-for another kernel image called "linux-smp" or something.
-
-The next time you compile the kernel, when running a SMP kernel,
-edit linux/Makefile and change "MAKE=make" to "MAKE=make -jN"
-(where N = number of CPU + 1, or if you have tons of memory/swap
- you can just use "-j" without a number). Feel free to experiment
-with this one.
-
-Of course you should time how long each build takes :-)
-Example:
- make config
- time -v sh -c 'make clean install modules modules_install'
-
-If you are using some Compaq MP compliant machines you will need to set
-the operating system in the BIOS settings to "Unixware" - don't ask me
-why Compaqs don't work otherwise.
RAYLINK/WEBGEAR 802.11 WIRELESS LAN DRIVER
P: Corey Thomas
-M: corey@world.std.com
+M: coreythomas@charter.net
L: linux-wireless@vger.kernel.org
S: Maintained
S: Maintained
TRIVIAL PATCHES
-P: Adrian Bunk
+P: Jesper Juhl
M: trivial@kernel.org
L: linux-kernel@vger.kernel.org
-W: http://www.kernel.org/pub/linux/kernel/people/bunk/trivial/
-T: git kernel.org:/pub/scm/linux/kernel/git/bunk/trivial.git
-S: Maintained
-
-TMS380 TOKEN-RING NETWORK DRIVER
-P: Adam Fritzler
-M: mid@auk.cx
-L: linux-tr@linuxtr.net
-W: http://www.auk.cx/tms380tr/
S: Maintained
TULIP NETWORK DRIVER
# Single targets
# ---------------------------------------------------------------------------
# Single targets are compatible with:
-# - build whith mixed source and output
+# - build with mixed source and output
# - build with separate output dir 'make O=...'
# - external modules
#
singleprocessor machines. On a singleprocessor machine, the kernel
will run faster if you say N here.
- See also the <file:Documentation/smp.txt>, and the SMP-HOWTO
- available at <http://www.tldp.org/docs.html#howto>.
+ See also the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
processor machines. On a single processor machine, the kernel will
run faster if you say N here.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/i386/IO-APIC.txt>,
+ See also <file:Documentation/i386/IO-APIC.txt>,
<file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
<http://www.linuxdoc.org/docs.html#howto>.
/*
* There are three devices connected to the SSP interface:
* 1. A touchscreen controller (TI ADS7846 compatible)
- * 2. An LCD contoller (with some Backlight functionality)
+ * 2. An LCD controller (with some Backlight functionality)
* 3. A battery monitoring IC (Maxim MAX1111)
*
* Each device uses a different speed/mode of communication.
ucb1x00_adc_enable(ucb);
ucb1x00_io_write(ucb, COLLIE_TC35143_GPIO_TMP_ON, 0);
- /* >1010 = battery removed, 460 = 22C ?, higer = lower temp ? */
+ /* >1010 = battery removed, 460 = 22C ?, higher = lower temp ? */
voltage = ucb1x00_adc_read(ucb, UCB_ADC_INP_AD0, UCB_SYNC);
ucb1x00_io_write(ucb, 0, COLLIE_TC35143_GPIO_TMP_ON);
ucb1x00_adc_disable(ucb);
* Mark IRQ_LCD valid
*
* 25-Jul-2005 Ben Dooks
- * Split the S3C2440 IRQ code to seperate file
+ * Split the S3C2440 IRQ code to separate file
*/
#include <linux/init.h>
Setting this option causes the FR-V atomic operations to be mostly
implemented out-of-line.
- See Documentation/fujitsu/frv/atomic-ops.txt for more information.
+ See Documentation/frv/atomic-ops.txt for more information.
config HIGHMEM
bool "High memory support"
andi.p gr5,#~PSR_ET,gr5
# set CCCR.CC3 to Undefined to abort atomic-modify completion inside the kernel
- # - for an explanation of how it works, see: Documentation/fujitsu/frv/atomic-ops.txt
+ # - for an explanation of how it works, see: Documentation/frv/atomic-ops.txt
andi gr25,#~0xc0,gr25
sti gr20,@(gr28,#REG_TBR)
sti gr22,@(sp,#REG_SP)
# set CCCR.CC3 to Undefined to abort atomic-modify completion inside the kernel
- # - for an explanation of how it works, see: Documentation/fujitsu/frv/atomic-ops.txt
+ # - for an explanation of how it works, see: Documentation/frv/atomic-ops.txt
movsg cccr,gr20
andi gr20,#~0xc0,gr20
movgs gr20,cccr
/* atomic-ops.S: kernel atomic operations
*
* For an explanation of how atomic ops work in this arch, see:
- * Documentation/fujitsu/frv/atomic-ops.txt
+ * Documentation/frv/atomic-ops.txt
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
printk("virtual vector at 0x%08lx\n",(unsigned long)ramvec);
#if defined(CONFIG_GDB_DEBUG)
- /* save orignal break vector */
+ /* save original break vector */
break_vec = ramvec[TRAP3_VEC];
#else
break_vec = VECTOR(trace_break);
single processor systems. On a single processor system, the kernel
will run faster if you say N here.
- See also the <file:Documentation/smp.txt> and the SMP-HOWTO
- available at <http://www.tldp.org/docs.html#howto>.
+ See also the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
Management" code will be disabled if you say Y here.
- See also the <file:Documentation/smp.txt>,
- and the SMP-HOWTO available at
+ See also the SMP-HOWTO available at
<http://www.linuxdoc.org/docs.html#howto>.
If you don't know what to do here, say N.
return 0;
}
- /* Recover orignal instruction code. */
+ /* Recover original instruction code. */
*code = p->insn[i];
/* Shift debug trap entries. */
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
- See also the <file:Documentation/smp.txt> and the SMP-HOWTO
- available at <http://www.tldp.org/docs.html#howto>.
+ See also the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
#endif
if (assert && devsel != 0) {
- // supress signal to cardbus
+ // suppress signal to cardbus
au_writel( 0x00000002, SYS_OUTPUTCLR ); // set EXT_IO3 OFF
}
else {
jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
{
/*
- * Convert jiffies to nanoseconds and seperate with
+ * Convert jiffies to nanoseconds and separate with
* one divide.
*/
u64 nsec = (u64)jiffies * TICK_NSEC;
jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value)
{
/*
- * Convert jiffies to nanoseconds and seperate with
+ * Convert jiffies to nanoseconds and separate with
* one divide.
*/
u64 nsec = (u64)jiffies * TICK_NSEC;
}
}
- /* Run the syscall at the priviledge of the user who loaded the
+ /* Run the syscall at the privilege of the user who loaded the
SP program */
if (vpe_getuid(tclimit))
#endif /* CONFIG_SGI_IP27 */
/*
- * arch_mem_init - initialize memory managment subsystem
+ * arch_mem_init - initialize memory management subsystem
*
* o plat_mem_setup() detects the memory configuration and will record detected
* memory areas using add_memory_region.
*
* At this stage the memory configuration of the system is known to the
- * kernel but generic memory managment system is still entirely uninitialized.
+ * kernel but generic memory management system is still entirely uninitialized.
*
* o bootmem_init()
* o sparse_init()
static atomic_t ipi_timer_latch[NR_CPUS];
/*
- * Number of InterProcessor Interupt (IPI) message buffers to allocate
+ * Number of InterProcessor Interrupt (IPI) message buffers to allocate
*/
#define IPIBUF_PER_CPU 4
if (cpu_data[cpu].vpe_id != cpu_data[smp_processor_id()].vpe_id) {
if (type == SMTC_CLOCK_TICK)
atomic_inc(&ipi_timer_latch[cpu]);
- /* If not on same VPE, enqueue and send cross-VPE interupt */
+ /* If not on same VPE, enqueue and send cross-VPE interrupt */
smtc_ipi_nq(&IPIQ[cpu], pipi);
LOCK_CORE_PRA();
settc(cpu_data[cpu].tc_id);
return;
if (!cpu_has_vint)
- panic("SMTC Kernel requires Vectored Interupt support");
+ panic("SMTC Kernel requires Vectored Interrupt support");
set_vi_handler(MIPS_CPU_IPI_IRQ, ipi_irq_dispatch);
/*
* Do the probing thing on R4000SC and R4400SC processors. Other
* processors don't have a S-cache that would be relevant to the
- * Linux memory managment.
+ * Linux memory management.
*/
switch (c->cputype) {
case CPU_R4000SC:
}
/*
- * hub_pio_init - PIO-related hub initalization
+ * hub_pio_init - PIO-related hub initialization
*
* @hub: hubinfo structure for our hub
*/
singleprocessor machines. On a singleprocessor machine, the kernel
will run faster if you say N here.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
- at <http://www.tldp.org/docs.html#howto>.
+ See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
+ available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
/* save the current process space and pgd */
unsigned long space = mfsp(3), pgd = mfctl(25);
- /* we don't mind taking interrups since they may not
+ /* we don't mind taking interrupts since they may not
* do anything with user space, but we can't
* be preempted here */
preempt_disable();
{HPHW_FIO, 0x005, 0x000A9, 0x00, "AllegroLow Core PCI USB KB"},
{HPHW_FIO, 0x006, 0x000A9, 0x00, "AllegroHigh Core PCI SuperIO RS-232"},
{HPHW_FIO, 0x006, 0x000A9, 0x00, "AllegroHigh Core PCI USB KB"},
- {HPHW_FIO, 0x007, 0x000A9, 0x0, "Miscelaneous PCI Plug-in"},
+ {HPHW_FIO, 0x007, 0x000A9, 0x0, "Miscellaneous PCI Plug-in"},
{HPHW_FIO, 0x00A, 0x000A9, 0x0, "Lego 360 Core PCI SuperIO RS-232"},
{HPHW_FIO, 0x00A, 0x000A9, 0x0, "Lego 360 Core PCI USB KB"},
{HPHW_FIO, 0x004, 0x00320, 0x0, "Metheus Frame Buffer"},
flush_user_icache_range((unsigned long) &frame->tramp[0],
(unsigned long) &frame->tramp[TRAMP_SIZE]);
- /* TRAMP Words 0-4, Lenght 5 = SIGRESTARTBLOCK_TRAMP
+ /* TRAMP Words 0-4, Length 5 = SIGRESTARTBLOCK_TRAMP
* TRAMP Words 5-9, Length 4 = SIGRETURN_TRAMP
* So the SIGRETURN_TRAMP is at the end of SIGRESTARTBLOCK_TRAMP
*/
singleprocessor machines. On a singleprocessor machine, the kernel
will run faster if you say N here.
- See also the <file:Documentation/smp.txt> and the SMP-HOWTO
- available at <http://www.tldp.org/docs.html#howto>.
+ See also the SMP-HOWTO available at
+ <http://www.tldp.org/docs.html#howto>.
Even if you don't know what to do here, say Y.
People using multiprocessor machines who say Y here should also say
Y to "Enhanced Real Time Clock Support", below.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
- at <http://www.tldp.org/docs.html#howto>.
+ See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
+ available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
Management" code will be disabled if you say Y here.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
- <http://www.tldp.org/docs.html#howto>.
+ See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
+ available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
struct resource *res;
int order;
- /* XXX why are some lenghts signed, others unsigned? */
+ /* XXX why are some lengths signed, others unsigned? */
if (len <= 0) {
return NULL;
}
*/
dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *va, size_t len, int direction)
{
- /* XXX why are some lenghts signed, others unsigned? */
+ /* XXX why are some lengths signed, others unsigned? */
if (len <= 0) {
return 0;
}
Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
Management" code will be disabled if you say Y here.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
- <http://www.tldp.org/docs.html#howto>.
+ See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
+ available at <http://www.tldp.org/docs.html#howto>.
If you don't know what to do here, say N.
err |= PUTREG(regs, RSI, to, si);
err |= PUTREG(regs, RBP, to, bp);
/*
- * Must use orignal RSP, which is passed in, rather than what's in
+ * Must use original RSP, which is passed in, rather than what's in
* the pt_regs, because that's already been updated to point at the
* signal frame.
*/
Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
Management" code will be disabled if you say Y here.
- See also the <file:Documentation/smp.txt>,
- <file:Documentation/i386/IO-APIC.txt>,
+ See also <file:Documentation/i386/IO-APIC.txt>,
<file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
<http://www.tldp.org/docs.html#howto>.
#include <linux/module.h>
/**
- * find_next_bit - find the first set bit in a memory region
+ * find_next_bit - find the next set bit in a memory region
* @addr: The address to base the search on
* @offset: The bitnumber to start searching at
* @size: The maximum size to search
}
/**
- * find_next_zero_bit - find the first zero bit in a memory region
+ * find_next_zero_bit - find the next zero bit in a memory region
* @addr: The address to base the search on
* @offset: The bitnumber to start searching at
* @size: The maximum size to search
if (ACPI_SUCCESS(status))
device->flags.wake_capable = 1;
- /* TBD: Peformance management */
+ /* TBD: Performance management */
return 0;
}
/*******************************************************************************
*
- * Module Name: utresrc - Resource managment utilities
+ * Module Name: utresrc - Resource management utilities
*
******************************************************************************/
if (is_slave) {
/* clear TIME1|IE1|PPE1|DTE1 */
master_data &= 0xff0f;
- /* Enable SITRE (seperate slave timing register) */
+ /* Enable SITRE (separate slave timing register) */
master_data |= 0x4000;
/* enable PPE1, IE1 and TIME1 as needed */
master_data |= (control << 4);
/**
* ata_do_set_mode - Program timings and issue SET FEATURES - XFER
* @link: link on which timings will be programmed
- * @r_failed_dev: out paramter for failed device
+ * @r_failed_dev: out parameter for failed device
*
* Standard implementation of the function used to tune and set
* ATA device disk transfer mode (PIO3, UDMA6, etc.). If
if (irq < 0)
return irq;
- /* Setup struct containing private infomation */
+ /* Setup struct containing private information */
info = kzalloc(sizeof(struct at32_ide_info), GFP_KERNEL);
if (!info)
return -ENOMEM;
idetm_data &= 0xCC0F;
idetm_data |= (control << 4);
- /* Slave timing in seperate register */
+ /* Slave timing in separate register */
pci_read_config_byte(dev, 0x44, &slave_data);
slave_data &= 0x0F << shift;
slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift;
idetm_data &= 0xCC0F;
idetm_data |= (control << 4);
- /* Slave timing in seperate register */
+ /* Slave timing in separate register */
pci_read_config_byte(dev, 0x44, &slave_data);
slave_data &= 0xF0;
slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << 4;
if (adev->dma_mode < XFER_UDMA_0) {
/* bits 3-0 hold recovery timing bits 8-10 active timing and
- the higer bits are dependant on the device */
+ the higher bits are dependant on the device */
timing &= ~0x870F;
timing |= mwdma_bits[speed];
} else {
if (adev->dma_mode < XFER_UDMA_0) {
/* bits 3-0 hold recovery timing bits 8-10 active timing and
- the higer bits are dependant on the device, bit 15 udma */
+ the higher bits are dependant on the device, bit 15 udma */
timing &= ~0x870F;
timing |= mwdma_bits[speed];
} else {
rc = sendcmd(CCISS_RESET_MSG, ctlr, NULL, 0, 2, 0, 0,
(unsigned char *) &cmd_in_trouble->Header.LUN.LunAddrBytes[0],
TYPE_MSG);
- /* sendcmd turned off interrputs on the board, turn 'em back on. */
+ /* sendcmd turned off interrupts on the board, turn 'em back on. */
(*c)->access.set_intr_mask(*c, CCISS_INTR_ON);
if (rc == 0)
return SUCCESS;
0, 2, 0, 0,
(unsigned char *) &cmd_to_abort->Header.LUN.LunAddrBytes[0],
TYPE_MSG);
- /* sendcmd turned off interrputs on the board, turn 'em back on. */
+ /* sendcmd turned off interrupts on the board, turn 'em back on. */
(*c)->access.set_intr_mask(*c, CCISS_INTR_ON);
if (rc == 0)
return SUCCESS;
outb(lcr, iobase + UART_LCR); /* Set 8N1 */
outb(fcr, iobase + UART_FCR); /* Enable FIFO's */
- /* Turn on interrups */
+ /* Turn on interrupts */
outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER);
spin_unlock_irqrestore(&(info->lock), flags);
#define R300_RE_FOG_START 0x4298
/* Not sure why there are duplicate of factor and constant values.
- * My best guess so far is that there are seperate zbiases for test and write.
+ * My best guess so far is that there are separate zbiases for test and write.
* Ordering might be wrong.
* Some of the tests indicate that fgl has a fallback implementation of zbias
* via pixel shaders.
}
/*
- * This function is used internally by ring buffer mangement code.
+ * This function is used internally by ring buffer management code.
*
* Returns virtual pointer to ring buffer.
*/
*
* NOTES:
* - Locking is required for safe execution of EFI calls with regards
- * to interrrupts and SMP.
+ * to interrupts and SMP.
*
* TODO (December 1999):
* - provide the API to set/get the WakeUp Alarm (different from the
res |= cflag & ((CBAUD ^ CBAUDEX) | PARODD | PARENB | CSTOPB | CSIZE);
/*
* This gets a little confusing. The Digi cards have their own
- * representation of c_cflags controling baud rate. For the most part
+ * representation of c_cflags controlling baud rate. For the most part
* this is identical to the Linux implementation. However; Digi
* supports one rate (76800) that Linux doesn't. This means that the
* c_cflag entry that would normally mean 76800 for Digi actually means
{
/*
* This call is made by the apps to complete the
- * initilization of the board(s). This routine is
+ * initialization of the board(s). This routine is
* responsible for setting the card to its initial
* state and setting the drivers control fields to the
* sutianle settings for the card in question.
* The hangcheck-timer driver uses the TSC to catch delays that
* jiffies does not notice. A timer is set. When the timer fires, it
* checks whether it was delayed and if that delay exceeds a given
- * margin of error. The hangcheck_tick module paramter takes the timer
+ * margin of error. The hangcheck_tick module parameter takes the timer
* duration in seconds. The hangcheck_margin parameter defines the
* margin of error, in seconds. The defaults are 60 seconds for the
* timer and 180 seconds for the margin of error. IOW, a timer is set
if (!hvcsd)
return -ENODEV;
- /* By this time the vty-server won't be getting any more interrups */
+ /* By this time the vty-server won't be getting any more interrupts */
spin_lock_irqsave(&hvcsd->lock, flags);
if (!in_interrupt()) {
schedule_timeout_interruptible(1); // short nap
} else {
- // we cannot sched/sleep in interrrupt silly
+ // we cannot sched/sleep in interrupt silly
return 0;
}
if (signal_pending(current)) {
// Just polled boards, IRQ = 0 will hit all non-interrupt boards.
// It will NOT poll boards handled by hard interrupts.
- // The issue of queued BH interrups is handled in ip2_interrupt().
+ // The issue of queued BH interrupts is handled in ip2_interrupt().
ip2_polled_interrupt();
PollTimer.expires = POLL_TIMEOUT;
/* mgsl_isr_misc()
*
- * Service a miscellaneos interrupt source.
+ * Service a miscellaneous interrupt source.
*
* Arguments: info pointer to device extension (instance data)
* Return Value: None
if (tosh_probe())
return -ENODEV;
- printk(KERN_INFO "Toshiba System Managment Mode driver v" TOSH_VERSION "\n");
+ printk(KERN_INFO "Toshiba System Management Mode driver v" TOSH_VERSION "\n");
/* set the port to use for Fn status if not specified as a parameter */
if (tosh_fn==0x00)
#include <linux/dio.h>
- /**
- * dio_match_device - Tell if a DIO device structure has a matching
- * DIO device id structure
- * @ids: array of DIO device id structures to search in
- * @dev: the DIO device structure to match against
- *
- * Used by a driver to check whether a DIO device present in the
- * system is in its list of supported devices. Returns the matching
- * dio_device_id structure or %NULL if there is no match.
- */
+/**
+ * dio_match_device - Tell if a DIO device structure has a matching DIO device id structure
+ * @ids: array of DIO device id structures to search in
+ * @d: the DIO device structure to match against
+ *
+ * Used by a driver to check whether a DIO device present in the
+ * system is in its list of supported devices. Returns the matching
+ * dio_device_id structure or %NULL if there is no match.
+ */
const struct dio_device_id *
dio_match_device(const struct dio_device_id *ids,
}
- /**
- * dio_register_driver - register a new DIO driver
- * @drv: the driver structure to register
- *
- * Adds the driver structure to the list of registered drivers
- * Returns zero or a negative error value.
- */
+/**
+ * dio_register_driver - register a new DIO driver
+ * @drv: the driver structure to register
+ *
+ * Adds the driver structure to the list of registered drivers
+ * Returns zero or a negative error value.
+ */
int dio_register_driver(struct dio_driver *drv)
{
}
- /**
- * dio_unregister_driver - unregister a DIO driver
- * @drv: the driver structure to unregister
- *
- * Deletes the driver structure from the list of registered DIO drivers,
- * gives it a chance to clean up by calling its remove() function for
- * each device it was responsible for, and marks those devices as
- * driverless.
- */
+/**
+ * dio_unregister_driver - unregister a DIO driver
+ * @drv: the driver structure to unregister
+ *
+ * Deletes the driver structure from the list of registered DIO drivers,
+ * gives it a chance to clean up by calling its remove() function for
+ * each device it was responsible for, and marks those devices as
+ * driverless.
+ */
void dio_unregister_driver(struct dio_driver *drv)
{
}
- /**
- * dio_bus_match - Tell if a DIO device structure has a matching DIO
- * device id structure
- * @ids: array of DIO device id structures to search in
- * @dev: the DIO device structure to match against
- *
- * Used by a driver to check whether a DIO device present in the
- * system is in its list of supported devices. Returns the matching
- * dio_device_id structure or %NULL if there is no match.
- */
+/**
+ * dio_bus_match - Tell if a DIO device structure has a matching DIO device id structure
+ * @dev: the DIO device structure to match against
+ * @drv: the &device_driver that points to the array of DIO device id structures to search
+ *
+ * Used by a driver to check whether a DIO device present in the
+ * system is in its list of supported devices. Returns the matching
+ * dio_device_id structure or %NULL if there is no match.
+ */
static int dio_bus_match(struct device *dev, struct device_driver *drv)
{
*
* Last action on the pci control structure.
*
- * call the remove sysfs informaton, which will unregister
+ * call the remove sysfs information, which will unregister
* this control struct's kobj. When that kobj's ref count
* goes to zero, its release function will be call and then
* kfree() the memory.
u16 b1_ambpresent0; /* Branch 1, Channel 8 */
u16 b1_ambpresent1; /* Branch 1, Channel 1 */
- /* DIMM infomation matrix, allocating architecture maximums */
+ /* DIMM information matrix, allocating architecture maximums */
struct i5000_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS];
/* Actual values for this controller */
*
* This code takes information provided by BIOS EDD calls
* fn41 - Check Extensions Present and
- * fn48 - Get Device Parametes with EDD extensions
+ * fn48 - Get Device Parameters with EDD extensions
* made in setup.S, copied to safe structures in setup.c,
* and presents it in sysfs.
*
}
/*
- * Lenghten active & recovery time so that cycle time is correct.
+ * Lengthen active & recovery time so that cycle time is correct.
*/
if (t->act8b + t->rec8b < t->cyc8b) {
#include <linux/init.h>
#include <linux/gameport.h>
#include <linux/wait.h>
-#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/kthread.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/input.h>
-#include <linux/irq.h>
#include <asm/portmux.h>
#include <asm/mach/bf54x_keys.h>
*/
#include <linux/device.h>
#include <linux/errno.h>
-#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/input.h>
/*
* gscps2_writeb_output() - write a byte to the port
*
- * returns 1 on sucess, 0 on error
+ * returns 1 on success, 0 on error
*/
static inline int gscps2_writeb_output(struct gscps2port *ps2port, u8 data)
return (1) ;
}
/*
- * Check if we registered whith an old maint driver (see debuglib.h)
+ * Check if we registered with an old maint driver (see debuglib.h)
*/
if ( myDriverDebugHandle.dbg_end != NULL
/* location of 'dbg_prt' in _OldDbgHandle_ struct */
} }
#endif
/*
- * For event level debug use a separate define, the paramete are
+ * For event level debug use a separate define, the parameter are
* different and cause compiler errors on some systems.
*/
#define DBG_EVL_ID(args) \
a->ram_in(a, &RcIn->RcId),
a->ram_in(a, &RcIn->RcCh),
a->ram_inw(a, &RcIn->Reference),
- tmp[0], /* type of extended informtion */
+ tmp[0], /* type of extended information */
tmp[1]); /* extended information */
a->ram_out(a, &RcIn->Rc, 0);
}
/* b = IE1 */
/* S = IE1 length + cont. */
/* b = IE2 */
- /* S = IE2 lenght + cont. */
+ /* S = IE2 length + cont. */
sendf(plci->appl,
_MANUFACTURER_I,
Id,
}
ctrl = &cinfo->capi_ctrl;
if(len < CAPI_MSG_BASELEN) {
- printk(KERN_ERR "HYSDN Card%d: invalid CAPI-message, lenght %d!\n",
+ printk(KERN_ERR "HYSDN Card%d: invalid CAPI-message, length %d!\n",
card->myid, len);
return;
}
* - maybe add timeout to commands ?
* - blocking version of time functions
* - polling version of i2c commands (including timer that works with
- * interrutps off)
+ * interrupts off)
* - maybe avoid some data copies with i2c by directly using the smu cmd
* buffer and a lower level internal interface
* - understand SMU -> CPU events and implement reception of them via
/* CPU might have brought back the cache line, so we need
* to flush again before peeking at the SMU response. We
* flush the entire buffer for now as we haven't read the
- * reply lenght (it's only 2 cache lines anyway)
+ * reply length (it's only 2 cache lines anyway)
*/
faddr = (unsigned long)smu->cmd_buf;
flush_inval_dcache_range(faddr, faddr + 256);
}
dev->revision &= 0xf;
- /* remap the memory from virtual to physical adress */
+ /* remap the memory from virtual to physical address */
err = pci_request_region(pci, 0, "saa7146");
if (err < 0)
drop = 1;
/* else: destination address matches the MAC address of our receiver device */
}
- /* else: promiscious mode; pass everything up the stack */
+ /* else: promiscuous mode; pass everything up the stack */
if (drop) {
#ifdef ULE_DEBUG
gpio_bits(0x200,0x000);
mdelay(1);
- /* create a new conection */
+ /* create a new connection */
gpio_bits(0x480,0x080);
gpio_bits(0x480,0x480);
mdelay(1);
// initialize
err = indycam_write_block(client, 0, sizeof(initseq), (u8 *)&initseq);
if (err) {
- printk(KERN_ERR "IndyCam initalization failed\n");
+ printk(KERN_ERR "IndyCam initialization failed\n");
err = -EIO;
goto out_detach_client;
}
.get_frequency = microtune_get_frequency,
};
-// Initalization as described in "MT203x Programming Procedures", Rev 1.2, Feb.2001
+// Initialization as described in "MT203x Programming Procedures", Rev 1.2, Feb.2001
static int mt2032_init(struct dvb_frontend *fe)
{
struct microtune_priv *priv = fe->tuner_priv;
might want to increase this - however the driver operation will not
be impaired if it is too small. Instead additional units just
won't have an ID assigned and it might not be possible to specify
- module paramters for those extra units. */
+ module parameters for those extra units. */
#define PVR_NUM 20
#endif /* __PVRUSB2_H */
}
if (pdev->read_frame != NULL) {
- /* Decompression is a lenghty process, so it's outside of the lock.
+ /* Decompression is a lengthy process, so it's outside of the lock.
This gives the isoc_handler the opportunity to fill more frames
in the mean time.
*/
dprintk("adr:0x%02x, i:%d, o:%d, g:%d\n", client->addr, i, o, g);
- /* check if the paramters are valid */
+ /* check if the parameters are valid */
if (i < 1 || i > 6 || o < 1 || o > 4 || g < 0 || g > 6 || g % 2 != 0)
return -1;
unsigned int p;
/*
- the registers controling gain are 8 bit of which
+ the registers controlling gain are 8 bit of which
we affect only the last 4 bits with our gain.
we know that if saturation is 0, (unsaturated) then
we're grayscale (center axis of the colour cone) so
/* Function prototypes */
static void usbvision_release(struct usb_usbvision *usbvision);
-/* Default initalization of device driver parameters */
+/* Default initialization of device driver parameters */
/* Set the default format for ISOC endpoint */
static int isocMode = ISOC_MODE_COMPRESS;
/* Set the default Debug Mode of the device driver */
}
/* -----------------------------------------------------------------------
- * Client managment code
+ * Client management code
*/
/*
}
/*
- * Scan for a Buz card (actually for the PCI contoler ZR36057),
+ * Scan for a Buz card (actually for the PCI controller ZR36057),
* request the irq and map the io memory
*/
static int __devinit
udelay(1);
if (i++ > 200000) { // 200ms, there is for sure something wrong!!!
dprintk(1,
- "%s: timout at wait_end (last status: 0x%02x)\n",
+ "%s: timeout at wait_end (last status: 0x%02x)\n",
ptr->name, ptr->status1);
break;
}
udelay(1);
if (i++ > 200000) { // 200ms, there is for sure something wrong!!!
dprintk(1,
- "%s: timout at wait_end (last status: 0x%02x)\n",
+ "%s: timeout at wait_end (last status: 0x%02x)\n",
ptr->name, ptr->status);
break;
}
#define PL_LOGINFO_SUB_CODE_FRAME_XFER_ERROR (0x00000400) /* Bits 0-3 encode Transport Status Register (offset 0x08) */
/* Bit 0 is Status Bit 0: FrameXferErr */
/* Bit 1 & 2 are Status Bits 16 and 17: FrameXmitErrStatus */
- /* Bit 3 is Status Bit 18 WriteDataLenghtGTDataLengthErr */
+ /* Bit 3 is Status Bit 18 WriteDataLengthGTDataLengthErr */
#define PL_LOGINFO_SUB_CODE_TX_FM_CONNECTED_LOW (0x00000500)
#define PL_LOGINFO_SUB_CODE_SATA_NON_NCQ_RW_ERR_BIT_SET (0x00000600)
*
* Outputs: None.
* Return: 0 if successful
- * -EBUSY if previous command timout and IOC reset is not complete.
+ * -EBUSY if previous command timeout and IOC reset is not complete.
* -EFAULT if data unavailable
* -ENODEV if no such device/adapter
* -ETIME if timer expires
*
* Outputs: None.
* Return: 0 if successful
- * -EBUSY if previous command timout and IOC reset is not complete.
+ * -EBUSY if previous command timeout and IOC reset is not complete.
* -EFAULT if data unavailable
* -ENODEV if no such device/adapter
* -ETIME if timer expires
* Outputs: None.
* Return: 0 if successful
* -EFAULT if data unavailable
- * -EBUSY if previous command timout and IOC reset is not complete.
+ * -EBUSY if previous command timeout and IOC reset is not complete.
* -ENODEV if no such device/adapter
* -ETIME if timer expires
* -ENOMEM if memory allocation error
* Outputs: None.
* Return: 0 if successful
* -EFAULT if data unavailable
- * -EBUSY if previous command timout and IOC reset is not complete.
+ * -EBUSY if previous command timeout and IOC reset is not complete.
* -ENODEV if no such device/adapter
* -ETIME if timer expires
* -ENOMEM if memory allocation error
fail_out:
/*
- * Free task managment mf, and corresponding tm flags
+ * Free task management mf, and corresponding tm flags
*/
mpt_free_msg_frame(ioc, mf);
hd->tmPending = 0;
* status block. The status block could then be accessed through
* c->status_block.
*
- * Returns 0 on sucess or negative error code on failure.
+ * Returns 0 on success or negative error code on failure.
*/
int i2o_status_get(struct i2o_controller *c)
{
* hardware restriction. */
if (doc->mfr) {
if (doc->mfr == mfr && doc->id == id)
- return 1; /* This is another the same the first */
+ return 1; /* This is the same as the first */
else
printk(KERN_WARNING
"Flash chip at floor %d, chip %d is different:\n",
*
* 02-12-2002 TG Cleanup of module params
*
- * 02-20-2002 TG adjusted for different rd/wr adress support
+ * 02-20-2002 TG adjusted for different rd/wr address support
* added support for read device ready/busy line
* added page_cache
*
goto out;
}
- /* map physical adress */
+ /* map physical address */
autcpu12_fio_base = ioremap(AUTCPU12_PHYS_SMC, SZ_1K);
if (!autcpu12_fio_base) {
printk("Ioremap autcpu12 SmartMedia Card failed\n");
/* Release resources, unregister device */
nand_release(autcpu12_mtd);
- /* unmap physical adress */
+ /* unmap physical address */
iounmap(autcpu12_fio_base);
/* Free the MTD device structure */
* http://blackfin.uclinux.org/
* Bryan Wu <bryan.wu@analog.com>
*
- * Blackfin BF5xx on-chip NAND flash controler driver
+ * Blackfin BF5xx on-chip NAND flash controller driver
*
* Derived from drivers/mtd/nand/s3c2410.c
* Copyright (c) 2007 Ben Dooks <ben@simtec.co.uk>
nand_release(cs553x_mtd[i]);
cs553x_mtd[i] = NULL;
- /* unmap physical adress */
+ /* unmap physical address */
iounmap(mmio_base);
/* Free the MTD device structure */
return -ENOMEM;
}
- /* map physical adress */
+ /* map physical address */
ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
if (!ep7312_fio_base) {
printk("ioremap EDB7312 NAND flash failed\n");
struct mtd_oob_ops *ops);
/*
- * For devices which display every fart in the system on a seperate LED. Is
+ * For devices which display every fart in the system on a separate LED. Is
* compiled away when LED support is disabled.
*/
DEFINE_LED_TRIGGER(nand_led_trigger);
#define STATE_CMD_RESET 0x0000000C /* reset */
#define STATE_CMD_MASK 0x0000000F /* command states mask */
-/* After an addres is input, the simulator goes to one of these states */
+/* After an address is input, the simulator goes to one of these states */
#define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
#define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
#define STATE_ADDR_ZERO 0x00000030 /* one byte zero address was accepted */
*
* Changelog:
* 21-Sep-2004 BJD Initial version
- * 23-Sep-2004 BJD Mulitple device support
+ * 23-Sep-2004 BJD Multiple device support
* 28-Sep-2004 BJD Fixed ECC placement for Hardware mode
* 12-Oct-2004 BJD Fixed errors in use of platform data
* 18-Feb-2005 BJD Fix sparse errors
return -ENOMEM;
}
- /* map physical adress */
+ /* map physical address */
sharpsl_io_base = ioremap(sharpsl_phys_base, 0x1000);
if (!sharpsl_io_base) {
printk("ioremap to access Sharp SL NAND chip failed\n");
}
}
-/* calc_chain_lenght: Walk through a Virtual Unit Chain and estimate chain length */
+/* calc_chain_length: Walk through a Virtual Unit Chain and estimate chain length */
static int calc_chain_length(struct NFTLrecord *nftl, unsigned int first_block)
{
unsigned int length = 0, block = first_block;
* Many modifications, and currently maintained, by
* Philip Blundell <philb@gnu.org>
* Added the Compaq LTE Alan Cox <alan@redhat.com>
- * Added MCA support Adam Fritzler <mid@auk.cx>
+ * Added MCA support Adam Fritzler
*
* Note - this driver is experimental still - it has problems on faster
* machines. Someone needs to sit down and go through it line by line with
struct frame_cb {
void *start; /* Start of frame in DMA mem */
- int len; /* Lenght of frame in DMA mem */
+ int len; /* Length of frame in DMA mem */
};
struct tx_fifo {
struct frame_cb queue[MAX_TX_WINDOW]; /* Info about frames in queue */
int ptr; /* Currently being sent */
- int len; /* Lenght of queue */
+ int len; /* Length of queue */
int free; /* Next free slot */
void *tail; /* Next free start in DMA mem */
};
struct frame_cb {
void *start; /* Start of frame in DMA mem */
- int len; /* Lenght of frame in DMA mem */
+ int len; /* Length of frame in DMA mem */
};
struct tx_fifo {
struct frame_cb queue[MAX_TX_WINDOW]; /* Info about frames in queue */
int ptr; /* Currently being sent */
- int len; /* Lenght of queue */
+ int len; /* Length of queue */
int free; /* Next free slot */
void *tail; /* Next free start in DMA mem */
};
struct frame_cb {
void *start; /* Start of frame in DMA mem */
- int len; /* Lenght of frame in DMA mem */
+ int len; /* Length of frame in DMA mem */
};
struct tx_fifo {
struct frame_cb queue[MAX_TX_WINDOW + 2]; /* Info about frames in queue */
int ptr; /* Currently being sent */
- int len; /* Lenght of queue */
+ int len; /* Length of queue */
int free; /* Next free slot */
void *tail; /* Next free start in DMA mem */
};
*
* "The author (me) didn't use spin_lock_irqsave because the slowness of the
* card means that approach caused horrible problems like losing serial data
- * at 38400 baud on some chips. Rememeber many 8390 nics on PCI were ISA
+ * at 38400 baud on some chips. Remember many 8390 nics on PCI were ISA
* chips with FPGA front ends.
*
* Ok the logic behind the 8390 is very simple:
req->cmd.sba_cmd = REQUEST_ALLOCATION ;
/*
- * set the parameter type and parameter lenght of all used
+ * set the parameter type and parameter length of all used
* parameters
*/
/* u_long td; transmit descriptor */
/* struct fddi_mac *mac; mac frame pointer */
/* unsigned off; start address within buffer memory */
-/* int len ; lenght of the frame including the FC */
+/* int len ; length of the frame including the FC */
{
int i ;
u_int *p ;
DB_RX("frame length = %d",len,0,4) ;
/*
- * check the frame_lenght and all error flags
+ * check the frame_length and all error flags
*/
if (rfsw & (RX_MSRABT|RX_FS_E|RX_FS_CRC|RX_FS_IMPL)){
if (rfsw & RD_S_MSRABT) {
* - Madge Smart 16/4 PCI Mk2
*
* Maintainer(s):
- * AF Adam Fritzler mid@auk.cx
+ * AF Adam Fritzler
*
* Modification History:
* 30-Dec-99 AF Split off from the tms380tr driver.
* abyss.h: Header for the abyss tms380tr module
*
* Authors:
- * - Adam Fritzler <mid@auk.cx>
+ * - Adam Fritzler
*/
#ifndef __LINUX_MADGETR_H
* - Madge Smart 16/4 Ringnode MC32 (??)
*
* Maintainer(s):
- * AF Adam Fritzler mid@auk.cx
+ * AF Adam Fritzler
*
* Modification History:
* 16-Jan-00 AF Created
* madgemc.h: Header for the madgemc tms380tr module
*
* Authors:
- * - Adam Fritzler <mid@auk.cx>
+ * - Adam Fritzler
*/
#ifndef __LINUX_MADGEMC_H
* - Proteon 1392, 1392+
*
* Maintainer(s):
- * AF Adam Fritzler mid@auk.cx
+ * AF Adam Fritzler
* JF Jochen Friedrich jochen@scram.de
*
* Modification History:
* - SysKonnect TR4/16(+) ISA (SK-4190)
*
* Maintainer(s):
- * AF Adam Fritzler mid@auk.cx
+ * AF Adam Fritzler
* JF Jochen Friedrich jochen@scram.de
*
* Modification History:
* Maintainer(s):
* JS Jay Schulist jschlst@samba.org
* CG Christoph Goos cgoos@syskonnect.de
- * AF Adam Fritzler mid@auk.cx
+ * AF Adam Fritzler
* MLP Mike Phillips phillim@amtrak.com
* JF Jochen Friedrich jochen@scram.de
*
*
* Authors:
* - Christoph Goos <cgoos@syskonnect.de>
- * - Adam Fritzler <mid@auk.cx>
+ * - Adam Fritzler
*/
#ifndef __LINUX_TMS380TR_H
* - 3Com 3C339 Token Link Velocity
*
* Maintainer(s):
- * AF Adam Fritzler mid@auk.cx
+ * AF Adam Fritzler
*
* Modification History:
* 30-Dec-99 AF Split off from the tms380tr driver.
void __iomem *pt_boot_cmd = addr + CMD_OFFSET;
u32 i;
- /* boot buffer lenght */
+ /* boot buffer length */
writew(CFM_LOAD_BUFSZ, pt_boot_cmd + sizeof(u16));
writew(GEN_DEFPAR, pt_boot_cmd);
void __iomem *pt_boot_cmd = addr + CMD_OFFSET;
u32 i;
- /* boot buffer lenght */
+ /* boot buffer length */
writew(CFM_LOAD_BUFSZ, pt_boot_cmd + sizeof(u16));
writew(GEN_DEFPAR, pt_boot_cmd);
* Called via lbs_prepare_and_send_command(priv, CMD_802_11_SCAN, ...)
* from cmd.c
*
- * Sends a fixed lenght data part (specifying the BSS type and BSSID filters)
+ * Sends a fixed length data part (specifying the BSS type and BSSID filters)
* as well as a variable number/length of TLVs to the firmware.
*
* @param priv A pointer to struct lbs_private structure
resource blocks. */
/* FIXME: A lot of this stuff will eventually be useful after
- initializaton, for intelligently probing Ethernet and video chips,
+ initialization, for intelligently probing Ethernet and video chips,
among other things. The rest of it should go in the /proc code.
For now, we just use it to give verbose boot logs. */
if (pages_needed <= 8) {
/*
* LAN traffic will not thrash the TLB IFF the same NIC
- * uses 8 adjacent pages to map seperate payload data.
+ * uses 8 adjacent pages to map separate payload data.
* ie the same byte in the resource bit map.
*/
#if 0
}
/**
- * ccio_init - ccio initalization procedure.
+ * ccio_init - ccio initialization procedure.
*
* Register this driver.
*/
};
/**
- * hppb_init - HP-PB bus initalization procedure.
+ * hppb_init - HP-PB bus initialization procedure.
*
* Register this driver.
*/
idlens[1] = idlens[0]+2;
if (belen != lelen) {
int off = 2;
- /* Don't try lenghts of 0x100 and 0x200 as 1 and 2 */
+ /* Don't try lengths of 0x100 and 0x200 as 1 and 2 */
if (idlens[0] <= 2)
off = 0;
idlens[off] = max(belen, lelen);
handled = 1;
irc = pcc_get(i, PCIRC);
irc >>=16;
- debug(2, "m32r-pcc:interrput: socket %d pcirc 0x%02x ", i, irc);
+ debug(2, "m32r-pcc:interrupt: socket %d pcirc 0x%02x ", i, irc);
if (!irc)
continue;
I tried to control the CxOE signal with SS_OUTPUT_ENA,
but the reset signal seems connected via the 541.
If the CxOE is left high are some signals tristated and
- no pullups are present -> the cards act wierd.
+ no pullups are present -> the cards act weird.
So right now the buffers are enabled if the power is on. */
if (state->Vcc || state->Vpp)
/* NCR53C9x.c: Defines and structures for the NCR53C9x generic driver.
*
- * Originaly esp.h: Defines and structures for the Sparc ESP
+ * Originally esp.h: Defines and structures for the Sparc ESP
* (Enhanced SCSI Processor) driver under Linux.
*
* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
* Modified by Chris Faulhaber <jedgar@fxp.org>
* Added module command-line options
* 19-Jul-99
- * Modified by Adam Fritzler <mid@auk.cx>
+ * Modified by Adam Fritzler
* Added proper detection of the AHA-1640 (MCA version of AHA-1540)
*/
- (uint8_t *)ahd->qoutfifo);
}
-/*********************** Miscelaneous Support Functions ***********************/
+/*********************** Miscellaneous Support Functions ***********************/
static __inline struct ahd_initiator_tinfo *
ahd_fetch_transinfo(struct ahd_softc *ahd,
char channel, u_int our_id,
" verbose Enable verbose/diagnostic logging\n"
" allow_memio Allow device registers to be memory mapped\n"
" debug Bitmask of debug values to enable\n"
-" no_reset Supress initial bus resets\n"
+" no_reset Suppress initial bus resets\n"
" extended Enable extended geometry on all controllers\n"
" periodic_otag Send an ordered tagged transaction\n"
" periodically to prevent tag starvation.\n"
| AHD_FAINT_LED_BUG;
/*
- * IO Cell paramter setup.
+ * IO Cell parameter setup.
*/
AHD_SET_PRECOMP(ahd, AHD_PRECOMP_CUTBACK_29);
ahd->bugs |= AHD_INTCOLLISION_BUG|AHD_ABORT_LQI_BUG;
/*
- * IO Cell paramter setup.
+ * IO Cell parameter setup.
*/
AHD_SET_PRECOMP(ahd, AHD_PRECOMP_CUTBACK_29);
AHD_SET_SLEWRATE(ahd, AHD_SLEWRATE_DEF_REVB);
return (ahc->name);
}
-/*********************** Miscelaneous Support Functions ***********************/
+/*********************** Miscellaneous Support Functions ***********************/
static __inline void ahc_update_residual(struct ahc_softc *ahc,
struct scb *scb);
" debug Bitmask of debug values to enable\n"
" no_probe Toggle EISA/VLB controller probing\n"
" probe_eisa_vl Toggle EISA/VLB controller probing\n"
-" no_reset Supress initial bus resets\n"
+" no_reset Suppress initial bus resets\n"
" extended Enable extended geometry on all controllers\n"
" periodic_otag Send an ordered tagged transaction\n"
" periodically to prevent tag starvation.\n"
* where it can accept new commands.
* Return value:
- * 0 on sucess / -EIO on failure
+ * 0 on success / -EIO on failure
**/
static int __devinit ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
{
cstatus.value = (*ha->func.statupd) (ha);
if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
- /* Spurious Interupt ? */
+ /* Spurious Interrupt ? */
continue;
}
#define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
#define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
-#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timout */
+#define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
#define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
#define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
void
lpfc_mbox_cmpl_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
{
- /* This function expects to be called from interupt context */
+ /* This function expects to be called from interrupt context */
spin_lock(&phba->hbalock);
list_add_tail(&mbq->list, &phba->sli.mboxq_cmpl);
spin_unlock(&phba->hbalock);
/*
* START: Interface for the common management module
*
- * This is the module, which interfaces with the common mangement module to
+ * This is the module, which interfaces with the common management module to
* provide support for ioctl and sysfs
*/
/**
- * megaraid_cmm_register - register with the mangement module
+ * megaraid_cmm_register - register with the management module
* @adapter : HBA soft state
*
* Register with the management module, which allows applications to issue
/**
- * megaraid_cmm_unregister - un-register with the mangement module
+ * megaraid_cmm_unregister - un-register with the management module
* @adapter : HBA soft state
*
* Un-register with the management module.
* @kioc : CMM interface packet
* @action : command action
*
- * This routine is invoked whenever the Common Mangement Module (CMM) has a
+ * This routine is invoked whenever the Common Management Module (CMM) has a
* command for us. The 'action' parameter specifies if this is a new command
* or otherwise.
*/
*
* This routine will be called whenever user reads the logical drive
* attributes, go get the current logical drive mapping table from the
- * firmware. We use the managment API's to issue commands to the controller.
+ * firmware. We use the management API's to issue commands to the controller.
*
* NOTE: The commands issuance functionality is not generalized and
* implemented in context of "get ld map" command only. If required, the
}
/**
- * qla2x00_mgmt_svr_login() - Login to fabric Managment Service.
+ * qla2x00_mgmt_svr_login() - Login to fabric Management Service.
* @ha: HA context
*
* Returns 0 on success.
#define MAX_REQS_SERVICED_PER_INTR 16
#define ISCSI_IPADDR_SIZE 4 /* IP address size */
-#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alais name size */
+#define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */
#define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */
#define LSDW(x) ((u32)((u64)(x)))
}
config_chip = 1;
- /* Reset clears the semaphore, so aquire again */
+ /* Reset clears the semaphore, so acquire again */
if (ql4xxx_lock_drvr_wait(ha) != QLA_SUCCESS)
return QLA_ERROR;
}
EXPORT_SYMBOL_GPL(scsi_tgt_queue_command);
/*
- * This is run from a interrpt handler normally and the unmap
+ * This is run from a interrupt handler normally and the unmap
* needs process context so we must queue
*/
static void scsi_tgt_cmd_done(struct scsi_cmnd *cmd)
*
* The SAS transport class contains common code to deal with SAS HBAs,
* an aproximated representation of SAS topologies in the driver model,
- * and various sysfs attributes to expose these topologies and managment
+ * and various sysfs attributes to expose these topologies and management
* interfaces to userspace.
*
* In addition to the basic SCSI core objects this transport class
depends on SERIAL_NETX
select SERIAL_CORE_CONSOLE
help
- If you have enabled the serial port on the Motorola IMX
- CPU you can make it the console by answering Y to this option.
+ If you have enabled the serial port on the Hilscher NetX SoC
+ you can make it the console by answering Y to this option.
config SERIAL_OF_PLATFORM
tristate "Serial port on Open Firmware platform bus"
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#include<linux/serial_core.h>
+#include <linux/serial_core.h>
#define BAUD_TABLE_LIMIT ((sizeof(icom_acfg_baud)/sizeof(int)) - 1)
static int icom_acfg_baud[] = {
};
/**
- * mux_init - Serial MUX initalization procedure.
+ * mux_init - Serial MUX initialization procedure.
*
* Register the Serial MUX driver.
*/
#define SPI_FIFO_BYTE_WIDTH (2)
#define SPI_FIFO_OVERFLOW_MARGIN (2)
-/* DMA burst lenght for half full/empty request trigger */
+/* DMA burst length for half full/empty request trigger */
#define SPI_DMA_BLR (SPI_FIFO_DEPTH * SPI_FIFO_BYTE_WIDTH / 2)
/* Dummy char output to achieve reads.
/*
* Broadcom 43xx PCI-SSB bridge module
*
- * This technically is a seperate PCI driver module, but
+ * This technically is a separate PCI driver module, but
* because of its small size we include it in the SSB core
* instead of creating a standalone module.
*
pci_read_config_dword(rinfo->pdev, i * 4,
&rinfo->cfg_save[i]);
- /* Switch PCI power managment to D2. */
+ /* Switch PCI power management to D2. */
pci_disable_device(rinfo->pdev);
for (;;) {
pci_read_config_word(
// need altered timings to display correctly. So I decided that it is much
// better to provide a limited optimized set of modes plus the option of
// using the mode in effect at startup time (might be selected using the
-// vga=??? paramter). After that the user might use fbset to select any
+// vga=??? parameter). After that the user might use fbset to select any
// mode he likes, check_var will not try to alter geometry parameters as
// it would be necessary otherwise.
//
#define FIXED_MODE(d) ((d)->fixed_mode)
-/*** Driver paramters ***/
+/*** Driver parameters ***/
#define RINGBUFFER_SIZE KB(64)
#define HW_CURSOR_SIZE KB(4)
/*
* Change to a new video mode. We defer this to a later time to avoid any
* flicker and not to mess up the current LCD DMA context. For this we disable
- * the LCD controler, which will generate a DONE irq after the last frame has
+ * the LCD controller, which will generate a DONE irq after the last frame has
* been transferred. Then it'll be safe to reconfigure both the LCD controller
* as well as the LCD DMA.
*/
HEAD_PANEL = 1,
};
-/* SM501 memory adress */
+/* SM501 memory address */
struct sm501_mem {
unsigned long size;
unsigned long sm_addr;
* overflow periods respectively.
*
* Also, since we can't really expect userspace to be responsive enough
- * before the overflow happens, we maintain two seperate timers .. One in
+ * before the overflow happens, we maintain two separate timers .. One in
* the kernel for clearing out WOVF every 2ms or so (again, this depends on
* HZ == 1000), and another for monitoring userspace writes to the WDT device.
*
* @key: Key string to lookup in btree
* @value: Value stored with @key
*
- * On sucess, returns BEFS_OK and sets *@value to the value stored
+ * On success, returns BEFS_OK and sets *@value to the value stored
* with @key (usually the disk block number of an inode).
*
* On failure, returns BEFS_ERR or BEFS_BT_NOT_FOUND.
as in the indirect region code).
When/if blockno is found, if blockno is inside of a block
- run as stored on disk, we offset the start and lenght members
+ run as stored on disk, we offset the start and length members
of the block run, so that blockno is the start and len is
still valid (the run ends in the same place).
return 0;
}
-/* Let's use some macros to make this stack manipulation a litle clearer */
+/* Let's use some macros to make this stack manipulation a little clearer */
#ifdef CONFIG_STACK_GROWSUP
#define STACK_ADD(sp, items) ((elf_addr_t __user *)(sp) + (items))
#define STACK_ROUND(sp, items) \
* VxFS directory block header.
*
* This entry is the head of every filesystem block in a directory.
- * It is used for free space managment and additionally includes
+ * It is used for free space management and additionally includes
* a hash for speeding up directory search (lookup).
*
* The hash may be empty and in fact we do not use it all in the
};
/*
- * Adress space operations for immed files and directories.
+ * Address space operations for immed files and directories.
*/
const struct address_space_operations vxfs_immed_aops = {
.readpage = vxfs_immed_readpage,
fs_info(sdp, "jid=%u: Trying to acquire journal lock...\n",
jd->jd_jid);
- /* Aquire the journal lock so we can do recovery */
+ /* Acquire the journal lock so we can do recovery */
error = gfs2_glock_nq_num(sdp, jd->jd_jid, &gfs2_journal_glops,
LM_ST_EXCLUSIVE,
* are not obsolete.
*
* Of course, this optimization only makes sense in case
- * of NAND flashes (or other flashes whith
+ * of NAND flashes (or other flashes with
* !jffs2_can_mark_obsolete()), since on NOR flashes
* nodes are marked obsolete physically.
*
* xtTruncate_pmap()
*
* function:
- * Perform truncate to zero lenghth for deleted file, leaving the
+ * Perform truncate to zero length for deleted file, leaving the
* the xtree and working map untouched. This allows the file to
* be accessed via open file handles, while the delete of the file
* is committed to disk.
if (insert->ins_split != SPLIT_NONE) {
/*
* We could call ocfs2_insert_at_leaf() for some types
- * of splits, but it's easier to just let one seperate
+ * of splits, but it's easier to just let one separate
* function sort it all out.
*/
ocfs2_split_record(inode, left_path, right_path,
down_write(&oi->ip_alloc_sem);
/*
- * Prepare for worst case allocation scenario of two seperate
+ * Prepare for worst case allocation scenario of two separate
* extents.
*/
if (alloc == 2)
{
/*00*/ __u32 curr_master;
__u8 file_lock;
- __u8 compat_pad[3]; /* Not in orignal definition. Used to
+ __u8 compat_pad[3]; /* Not in original definition. Used to
make the already existing alignment
explicit */
__u64 last_write_time;
* sync-data inodes."
*
* Note: OCFS2 already does this differently for metadata vs data
- * allocations, as those bitmaps are seperate and undo access is never
+ * allocations, as those bitmaps are separate and undo access is never
* called on a metadata group descriptor.
*/
static int ocfs2_test_bg_bit_allocatable(struct buffer_head *bg_bh,
/* If we don't have cached information on this bitmap block, we're
* going to have to load it later anyway. Loading it here allows us
- * to make a better decision. This favors long-term performace gain
+ * to make a better decision. This favors long-term performance gain
* with a better on-disk layout vs. a short term gain of skipping the
* read and potentially having a bad placement. */
if (info->free_count == UINT_MAX) {
/*
* Relocation based on dirid, hashing them into a given bitmap block
- * files. Formatted nodes are unaffected, a seperate policy covers them
+ * files. Formatted nodes are unaffected, a separate policy covers them
*/
static void dirid_groups(reiserfs_blocknr_hint_t * hint)
{
/*
* Relocation based on oid, hashing them into a given bitmap block
- * files. Formatted nodes are unaffected, a seperate policy covers them
+ * files. Formatted nodes are unaffected, a separate policy covers them
*/
static void oid_groups(reiserfs_blocknr_hint_t * hint)
{
BUILD_BUG_ON(sizeof(struct signalfd_siginfo) != 128);
/*
- * Unused memebers should be zero ...
+ * Unused members should be zero ...
*/
err = __clear_user(uinfo, sizeof(*uinfo));
#endif
/*
- * ACPI Memory managment
+ * ACPI Memory management
*/
void *acpi_allocate(u32 size);
/* Limit Interface */
struct acpi_processor_lx {
- int px; /* performace state */
+ int px; /* performance state */
int tx; /* throttle level */
};
#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */
#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */
-#define USIR0_IR0 (1 << 0) /* Interrup request ep 0 */
-#define USIR0_IR1 (1 << 1) /* Interrup request ep 1 */
-#define USIR0_IR2 (1 << 2) /* Interrup request ep 2 */
-#define USIR0_IR3 (1 << 3) /* Interrup request ep 3 */
-#define USIR0_IR4 (1 << 4) /* Interrup request ep 4 */
-#define USIR0_IR5 (1 << 5) /* Interrup request ep 5 */
-#define USIR0_IR6 (1 << 6) /* Interrup request ep 6 */
-#define USIR0_IR7 (1 << 7) /* Interrup request ep 7 */
-
-#define USIR1_IR8 (1 << 0) /* Interrup request ep 8 */
-#define USIR1_IR9 (1 << 1) /* Interrup request ep 9 */
-#define USIR1_IR10 (1 << 2) /* Interrup request ep 10 */
-#define USIR1_IR11 (1 << 3) /* Interrup request ep 11 */
-#define USIR1_IR12 (1 << 4) /* Interrup request ep 12 */
-#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */
-#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */
-#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */
+#define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */
+#define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */
+#define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */
+#define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */
+#define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */
+#define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */
+#define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */
+#define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */
+
+#define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */
+#define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */
+#define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */
+#define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */
+#define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */
+#define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */
+#define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */
+#define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */
#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
#define USIR0 __REG(0x40600058) /* UDC Status Interrupt Register 0 */
-#define USIR0_IR0 (1 << 0) /* Interrup request ep 0 */
-#define USIR0_IR1 (1 << 1) /* Interrup request ep 1 */
-#define USIR0_IR2 (1 << 2) /* Interrup request ep 2 */
-#define USIR0_IR3 (1 << 3) /* Interrup request ep 3 */
-#define USIR0_IR4 (1 << 4) /* Interrup request ep 4 */
-#define USIR0_IR5 (1 << 5) /* Interrup request ep 5 */
-#define USIR0_IR6 (1 << 6) /* Interrup request ep 6 */
-#define USIR0_IR7 (1 << 7) /* Interrup request ep 7 */
+#define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */
+#define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */
+#define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */
+#define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */
+#define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */
+#define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */
+#define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */
+#define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */
#define USIR1 __REG(0x4060005C) /* UDC Status Interrupt Register 1 */
-#define USIR1_IR8 (1 << 0) /* Interrup request ep 8 */
-#define USIR1_IR9 (1 << 1) /* Interrup request ep 9 */
-#define USIR1_IR10 (1 << 2) /* Interrup request ep 10 */
-#define USIR1_IR11 (1 << 3) /* Interrup request ep 11 */
-#define USIR1_IR12 (1 << 4) /* Interrup request ep 12 */
-#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */
-#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */
-#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */
+#define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */
+#define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */
+#define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */
+#define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */
+#define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */
+#define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */
+#define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */
+#define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */
#elif defined(CONFIG_PXA27x)
#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
-#define ICCR0_AME (1 << 7) /* Adress match enable */
+#define ICCR0_AME (1 << 7) /* Address match enable */
#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
#define ICCR0_RXE (1 << 4) /* Receive enable */
#include <asm/arch/platform.h>
/*
- * IRQ interrupts definitions are the same the INT definitions
+ * IRQ interrupts definitions are the same as the INT definitions
* held within platform.h
*/
#define IRQ_VIC_START 0
#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31
/*
- * FIQ interrupts definitions are the same the INT definitions.
+ * FIQ interrupts definitions are the same as the INT definitions.
*/
#define FIQ_WDOGINT INT_WDOGINT
#define FIQ_SOFTINT INT_SOFTINT
#define IT8152_GPIO_GPDR __REG_IT8152(0x3f00500)
/*
- Interrup contoler per register summary:
+ Interrupt controller per register summary:
---------------------------------------
LCDNIRR:
IT8152_LD_IRQ(8) PCICLK stop
#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */
/* Boards following the design guidelines in the developer's manual,
- * with on-chip GPIOs not Lubbock's wierd hardware, can have a sane
+ * with on-chip GPIOs not Lubbock's weird hardware, can have a sane
* VBUS IRQ and omit the methods above. Store the GPIO number
* here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits.
* Note that sometimes the signals go through inverters...
/* atomic.h: atomic operation emulation for FR-V
*
* For an explanation of how atomic ops work in this arch, see:
- * Documentation/fujitsu/frv/atomic-ops.txt
+ * Documentation/frv/atomic-ops.txt
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
/* bitops.h: bit operations for the Fujitsu FR-V CPUs
*
* For an explanation of how atomic ops work in this arch, see:
- * Documentation/fujitsu/frv/atomic-ops.txt
+ * Documentation/frv/atomic-ops.txt
*
* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
* Written by David Howells (dhowells@redhat.com)
#define flush_dcache_mmap_unlock(mapping) do {} while(0)
/*
- * physically-indexed cache managment
+ * physically-indexed cache management
* - see arch/frv/lib/cache.S
*/
extern void frv_dcache_writeback(unsigned long start, unsigned long size);
* Written by David Howells (dhowells@redhat.com)
* - Derived from include/asm-i386/highmem.h
*
- * See Documentation/fujitsu/frv/mmu-layout.txt for more information.
+ * See Documentation/frv/mmu-layout.txt for more information.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
#ifdef CONFIG_MMU
-/* see Documentation/fujitsu/frv/mmu-layout.txt */
+/* see Documentation/frv/mmu-layout.txt */
#define KERNEL_LOWMEM_START __UL(0xc0000000)
#define KERNEL_LOWMEM_END __UL(0xd0000000)
#define VMALLOC_START __UL(0xd0000000)
/*
* we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
- * [see Documentation/fujitsu/frv/mmu-layout.txt]
+ * [see Documentation/frv/mmu-layout.txt]
*
* Page Directory:
* - Size: 16KB
/*
* A pointer passed in from user mode. This should not be used for syscall parameters,
* just declare them as pointers because the syscall entry code will have appropriately
- * comverted them already.
+ * converted them already.
*/
typedef u32 compat_uptr_t;
* tmp = __swab32(*(p++));
* tmp |= ~0UL >> (32-offset);
*
- * but this would decrease preformance, so we change the
+ * but this would decrease performance, so we change the
* shift:
*/
tmp = *(p++);
#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */
#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */
-#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */
+#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */
#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
#define CICR_IEN ((uint)0x00000080) /* Int. enable */
#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
/*
* Moved the udelay() function into library code, no longer inlined.
* I had to change the algorithm because we are overflowing now on
- * the faster ColdFire parts. The code is a little biger, so it makes
+ * the faster ColdFire parts. The code is a little bigger, so it makes
* sense to library it.
*/
extern void udelay(unsigned long usecs);
#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
#define MCFSIM_CSMR7 0xda /* CS 7 Mask reg (r/w) */
#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */
#else
-#define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
-#define MCFSIM_CSAR4 0xb0 /* CS 4 Adress reg (r/w) */
+#define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */
#define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */
#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */
-#define MCFSIM_CSAR5 0xbc /* CS 5 Adress reg (r/w) */
+#define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */
#define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */
#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */
-#define MCFSIM_CSAR6 0xc8 /* CS 6 Adress reg (r/w) */
+#define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */
#define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */
#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */
-#define MCFSIM_CSAR7 0xd4 /* CS 7 Adress reg (r/w) */
+#define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */
#define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */
#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */
#endif /* CONFIG_OLDMASK */
#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2 0x98 /* CS 2 Adress reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Adress reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
-#define MCFSIM_CSAR4 0xb0 /* CS 4 Adress reg (r/w) */
+#define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */
#define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */
#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */
-#define MCFSIM_CSAR5 0xbc /* CS 5 Adress reg (r/w) */
+#define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */
#define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */
#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */
-#define MCFSIM_CSAR6 0xc8 /* CS 6 Adress reg (r/w) */
+#define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */
#define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */
#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */
-#define MCFSIM_CSAR7 0xd4 /* CS 7 Adress reg (r/w) */
+#define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */
#define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */
#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */
#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */
-#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */
+#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */
#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
#define CICR_VBA_MASK ((uint)0x000000e0) /* Vector Base Address */
#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
#define MCFUART_UTB 0x0c /* Transmit Buffer (w) */
#define MCFUART_UIPCR 0x10 /* Input Port Change (r) */
#define MCFUART_UACR 0x10 /* Auxiliary Control (w) */
-#define MCFUART_UISR 0x14 /* Interrup Status (r) */
+#define MCFUART_UISR 0x14 /* Interrupt Status (r) */
#define MCFUART_UIMR 0x14 /* Interrupt Mask (w) */
#define MCFUART_UBG1 0x18 /* Baud Rate MSB (r/w) */
#define MCFUART_UBG2 0x1c /* Baud Rate LSB (r/w) */
* A pointer passed in from user mode. This should not
* be used for syscall parameters, just declare them
* as pointers because the syscall entry code will have
- * appropriately comverted them already.
+ * appropriately converted them already.
*/
typedef u32 compat_uptr_t;
/**
- * Adress alignment of the individual FPGA bytes.
+ * Address alignment of the individual FPGA bytes.
* The address arrangement of the individual bytes of the FPGA is two
* byte aligned at the embedded MK2 platform.
*/
#define GT_PCI_IO_SIZE 0x02000000UL
/*
- * PCI interrupts will come in on either the INTA or INTD interrups lines,
+ * PCI interrupts will come in on either the INTA or INTD interrupt lines,
* which are mapped to the #2 and #5 interrupt pins of the MIPS. On our
* boards, they all either come in on IntD or they all come in on IntA, they
* aren't mixed. There can be numerous PCI interrupts, so we keep a list of the
/*
* These are the virtual IRQ numbers, we divide all IRQ's into
* 'spaces', the 'space' determines where and how to enable/disable
- * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrups
+ * that particular IRQ on an SGI machine. HPC DMA and MC DMA interrupts
* are not supported this way. Driver is supposed to allocate HPC/MC
* interrupt as shareable and then look to proper status bit (see
* HAL2 driver). This will prevent many complications, trust me ;-)
#define IIO_IFDR 0x400398 /* IOQ FIFO Depth */
#define IIO_IIAP 0x4003a0 /* IIQ Arbitration Parameters */
#define IIO_IMMR IIO_IIAP
-#define IIO_ICMR 0x4003a8 /* CRB Managment Register */
+#define IIO_ICMR 0x4003a8 /* CRB Management Register */
#define IIO_ICCR 0x4003b0 /* CRB Control Register */
#define IIO_ICTO 0x4003b8 /* CRB Time Out Register */
#define IIO_ICTP 0x4003c0 /* CRB Time Out Prescalar */
* A pointer passed in from user mode. This should not
* be used for syscall parameters, just declare them
* as pointers because the syscall entry code will have
- * appropriately comverted them already.
+ * appropriately converted them already.
*/
typedef u32 compat_uptr_t;
#define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
#define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
-/* Additional section indeces. */
+/* Additional section indices. */
#define SHN_PARISC_ANSI_COMMON 0xff00 /* Section for tenatively declared
symbols in ANSI C. */
/*
* In parisc assembly a semicolon marks a comment while a
- * exclamation mark is used to seperate independent lines.
+ * exclamation mark is used to separate independent lines.
*/
#ifdef __ASSEMBLY__
/* nothing */
-#endif __ASM_PARISC_VGA_H__
+#endif /* __ASM_PARISC_VGA_H__ */
* A pointer passed in from user mode. This should not
* be used for syscall parameters, just declare them
* as pointers because the syscall entry code will have
- * appropriately comverted them already.
+ * appropriately converted them already.
*/
typedef u32 compat_uptr_t;
* A pointer passed in from user mode. This should not
* be used for syscall parameters, just declare them
* as pointers because the syscall entry code will have
- * appropriately comverted them already.
+ * appropriately converted them already.
*/
typedef u32 compat_uptr_t;
* A pointer passed in from user mode. This should not
* be used for syscall parameters, just declare them
* as pointers because the syscall entry code will have
- * appropriately comverted them already.
+ * appropriately converted them already.
*/
typedef u32 compat_uptr_t;
* A pointer passed in from user mode. This should not
* be used for syscall parameters, just declare them
* as pointers because the syscall entry code will have
- * appropriately comverted them already.
+ * appropriately converted them already.
*/
typedef u32 compat_uptr_t;
/**
* do_timer_interrupt_hook - hook into timer tick
- * @regs: standard registers from interrupt
*
* Call the pit clock event handler. see asm/i8253.h
**/
/*
* CHIOGELEM
- * get more detailed status informtion for a single element
+ * get more detailed status information for a single element
*/
struct changer_get_element {
int cge_type; /* type/unit */
__u32 fpga_version; /* FPGA Version Number Register */
__u32 cpu_start; /* CPU start Register (write) */
__u32 cpu_stop; /* CPU stop Register (write) */
- __u32 misc_reg; /* Miscelaneous Register */
+ __u32 misc_reg; /* Miscellaneous Register */
__u32 idt_mode; /* IDT mode Register */
__u32 uart_irq_status; /* UART IRQ status Register */
__u32 clear_timer0_irq; /* Clear timer interrupt Register */
* @n2win - level 2 window (values: 1 thru 7)
* @n3win - level 3 window (values: 1 thru 7)
* @nvc - # of logical channels (values: 1 thru 64)
- * @pktlen - level 3 packet lenght - log base 2 of size
+ * @pktlen - level 3 packet length - log base 2 of size
* @locaddr - my address
* @remaddr - remote address
* @t1 - time, in seconds
-#ifndef _ASM_LINUX_DMA_MAPPING_H
-#define _ASM_LINUX_DMA_MAPPING_H
+#ifndef _LINUX_DMA_MAPPING_H
+#define _LINUX_DMA_MAPPING_H
#include <linux/device.h>
#include <linux/err.h>
#include <linux/dma-mapping.h>
/**
- * enum dma_state - resource PNP/power managment state
+ * enum dma_state - resource PNP/power management state
* @DMA_RESOURCE_SUSPEND: DMA device going into low power state
* @DMA_RESOURCE_RESUME: DMA device returning to full power
* @DMA_RESOURCE_AVAILABLE: DMA device available to the system
* get_ringparam: Report ring sizes
* set_ringparam: Set ring sizes
* get_pauseparam: Report pause parameters
- * set_pauseparam: Set pause paramters
+ * set_pauseparam: Set pause parameters
* get_rx_csum: Report whether receive checksums are turned on or off
* set_rx_csum: Turn receive checksum on or off
* get_tx_csum: Report whether transmit checksums are turned on or off
* being set. find_inode() uses this to prevent returning
* nearly-dead inodes.
* I_SYNC Similar to I_LOCK, but limited in scope to writeback
- * of inode dirty data. Having a seperate lock for this
+ * of inode dirty data. Having a separate lock for this
* purpose reduces latency and prevents some filesystem-
* specific deadlocks.
*
#define SETFEATURES_EN_RLA 0xAA /* Enable read look-ahead feature */
#define SETFEATURES_PREFETCH 0xAB /* Sets drive prefetch value */
#define SETFEATURES_EN_REST 0xAC /* ATA-1 */
-#define SETFEATURES_4B_RW_LONG 0xBB /* Set Lenght of 4 bytes */
+#define SETFEATURES_4B_RW_LONG 0xBB /* Set Length of 4 bytes */
#define SETFEATURES_DIS_AAM 0xC2 /* Disable Automatic Acoustic Management */
#define SETFEATURES_EN_RPOD 0xCC /* Enable reverting to power on defaults */
#define SETFEATURES_DIS_RI 0xDD /* Disable release interrupt ATAPI */
* @get_time: function to retrieve the current time of the clock
* @get_softirq_time: function to retrieve the current time from the softirq
* @softirq_time: the time when running the hrtimer queue in the softirq
- * @cb_pending: list of timers where the callback is pending
* @offset: offset of this clock to the monotonic base
* @reprogram: function to reprogram the timer event
*/
/* LLC SAP types. */
#define LLC_SAP_NULL 0x00 /* NULL SAP. */
-#define LLC_SAP_LLC 0x02 /* LLC Sublayer Managment. */
+#define LLC_SAP_LLC 0x02 /* LLC Sublayer Management. */
#define LLC_SAP_SNA 0x04 /* SNA Path Control. */
-#define LLC_SAP_PNM 0x0E /* Proway Network Managment. */
+#define LLC_SAP_PNM 0x0E /* Proway Network Management. */
#define LLC_SAP_IP 0x06 /* TCP/IP. */
#define LLC_SAP_BSPAN 0x42 /* Bridge Spanning Tree Proto */
#define LLC_SAP_MMS 0x4E /* Manufacturing Message Srv. */
};
/* Functions above this comment are list-based old-style power
- * managment. Please avoid using them. */
+ * management. Please avoid using them. */
/*
* Callbacks for platform drivers to implement.
};
/*
- * Device Managemnt
+ * Device Management
*/
struct pnp_card {
*
* For API usage, in general,
* - any function _modifying_ the tree or tags (inserting or deleting
- * items, setting or clearing tags must exclude other modifications, and
+ * items, setting or clearing tags) must exclude other modifications, and
* exclude any functions reading the tree.
* - any function _reading_ the tree or tags (looking up items or tags,
* gang lookups) must exclude modifications to the tree, but may occur
unsigned long j_trans_id;
unsigned long j_mount_id;
unsigned long j_start; /* start of current waiting commit (index into j_ap_blocks) */
- unsigned long j_len; /* lenght of current waiting commit */
+ unsigned long j_len; /* length of current waiting commit */
unsigned long j_len_alloc; /* number of buffers requested by journal_begin() */
atomic_t j_wcount; /* count of writers for current commit */
unsigned long j_bcount; /* batch count. allows turning X transactions into 1 */
/*
* Pad strcture to 128 bytes. Remember to update the
- * pad size when you add new memebers. We use a fixed
+ * pad size when you add new members. We use a fixed
* size structure to avoid compatibility problems with
* future versions, and we leave extra space for additional
* members. We use fixed size members because this strcture
/* USB slave/gadget data port base */
#define SM501_USB_GADGET_DATA (0x070000)
-/* Display contoller/video engine base */
+/* Display controller/video engine base */
#define SM501_DC (0x080000)
/* common defines for the SM501 address registers */
/*
* In the UP-nondebug case there's no real locking going on, so the
* only thing we have to do is to keep the preempt counts and irq
- * flags straight, to supress compiler warnings of unused lock
+ * flags straight, to suppress compiler warnings of unused lock
* variables, and to add the proper checker annotations:
*/
#define __LOCK(lock) \
*/
struct iw_event
{
- __u16 len; /* Real lenght of this stuff */
+ __u16 len; /* Real length of this stuff */
__u16 cmd; /* Wireless IOCTL */
union iwreq_data u; /* IOCTL fixed payload */
};
saa6588.c and every driver (e.g. bttv-driver.c) that wants
to use the saa6588 module.
- Instead of having a seperate rds.h, I'd prefer to include
+ Instead of having a separate rds.h, I'd prefer to include
this stuff in one of the already existing files like tuner.h
(c) 2005 by Hans J. Koch
* ports has a unique presense on the SAN, and may be instantiated via
* NPIV, Virtual Fabrics, or via additional ALPAs. As the vport is a
* unique presense, each vport has it's own view of the fabric,
- * authentication priviledge, and priorities.
+ * authentication privilege, and priorities.
*
* A virtual port may support 1 or more FC4 roles. Typically it is a
* FCP Initiator. It could be a FCP Target, or exist sole for an IP over FC
#include <asm/pgtable.h>
#include <asm/mmu_context.h>
-extern void sem_exit (void);
-
static void exit_mm(struct task_struct * tsk);
static void __unhash_process(struct task_struct *p)
goto retry;
else if (error) {
/*
- * Wierd looking, but we return EAGAIN if the IDR is
+ * Weird looking, but we return EAGAIN if the IDR is
* full (proper POSIX return value for this)
*/
error = -EAGAIN;
* but again the multiple of the polynomial to subtract depends only on
* the high bits, the high 8 bits in this case.
*
- * The multile we need in that case is the low 32 bits of a 40-bit
+ * The multiple we need in that case is the low 32 bits of a 40-bit
* value whose high 8 bits are given, and which is a multiple of the
* generator polynomial. This is simply the CRC-32 of the given
* one-byte message.
int nice_match; /* Stop searching when current match exceeds this */
/* used by trees.c: */
- /* Didn't use ct_data typedef below to supress compiler warning */
+ /* Didn't use ct_data typedef below to suppress compiler warning */
struct ct_data_s dyn_ltree[HEAP_SIZE]; /* literal and length tree */
struct ct_data_s dyn_dtree[2*D_CODES+1]; /* distance tree */
struct ct_data_s bl_tree[2*BL_CODES+1]; /* Huffman tree for bit lengths */
/**
- * do_invalidatepage - invalidate part of all of a page
+ * do_invalidatepage - invalidate part or all of a page
* @page: the page which is affected
* @offset: the index of the truncation point
*
* @ops: pernet operations structure to manipulate
*
* Remove the pernet operations structure from the list to be
- * used when network namespaces are created or destoryed. In
+ * used when network namespaces are created or destroyed. In
* addition run the exit method for all existing network
* namespaces.
*/
* @ops: pernet operations structure to manipulate
*
* Remove the pernet operations structure from the list to be
- * used when network namespaces are created or destoryed. In
+ * used when network namespaces are created or destroyed. In
* addition run the exit method for all existing network
* namespaces.
*/
* rfkill_free - Mark rfkill structure for deletion
* @rfkill: rfkill structure to be destroyed
*
- * Decrements reference count of rfkill structure so it is destoryed.
+ * Decrements reference count of rfkill structure so it is destroyed.
* Note that rfkill_free() should _not_ be called after rfkill_unregister().
*/
void rfkill_free(struct rfkill *rfkill)
*
* This means that if we only want to abort associations
* in an authenticated way (i.e AUTH+ABORT), then we
- * can't destory this association just becuase the packet
+ * can't destroy this association just becuase the packet
* was malformed.
*/
if (sctp_auth_recv_cid(SCTP_CID_ABORT, asoc))
*
* This means that if we only want to abort associations
* in an authenticated way (i.e AUTH+ABORT), then we
- * can't destory this association just becuase the packet
+ * can't destroy this association just becuase the packet
* was malformed.
*/
if (sctp_auth_recv_cid(SCTP_CID_ABORT, asoc))
projects / linux-2.6-block.git / commitdiff