drm/i915/ehl: Update MOCS table for EHL
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 30 May 2019 23:40:14 +0000 (16:40 -0700)
committerMatt Roper <matthew.d.roper@intel.com>
Sat, 15 Jun 2019 15:19:49 +0000 (08:19 -0700)
EHL defines two new MOCS table entries but is otherwise compatible with
the ICL MOCS table.

These table entries (16 and 17) should still be considered unused for
ICL and as such their behavior remains undefined for that platform.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190530234014.22340-1-matthew.d.roper@intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
drivers/gpu/drm/i915/gt/intel_mocs.c

index 79df66022d3ab0e263090028b56277510f9baf2f..1f9db50b1869400d4b7920be3d47799850f1c9f6 100644 (file)
@@ -200,6 +200,14 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
        MOCS_ENTRY(15, \
                   LE_3_WB | LE_TC_1_LLC | LE_LRUM(2) | LE_AOM(1), \
                   L3_3_WB), \
+       /* Bypass LLC - Uncached (EHL+) */ \
+       MOCS_ENTRY(16, \
+                  LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
+                  L3_1_UC), \
+       /* Bypass LLC - L3 (Read-Only) (EHL+) */ \
+       MOCS_ENTRY(17, \
+                  LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
+                  L3_3_WB), \
        /* Self-Snoop - L3 + LLC */ \
        MOCS_ENTRY(18, \
                   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3) | LE_SSE(3), \