arm64: cpufeature: Don't enforce system-wide SPE capability
authorWill Deacon <will.deacon@arm.com>
Thu, 22 Sep 2016 10:23:07 +0000 (11:23 +0100)
committerWill Deacon <will.deacon@arm.com>
Tue, 10 Jan 2017 14:28:01 +0000 (14:28 +0000)
The statistical profiling extension (SPE) is an optional feature of
ARMv8.1 and is unlikely to be supported by all of the CPUs in a
heterogeneous system.

This patch updates the cpufeature checks so that such systems are not
tainted as unsupported.

Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/cpufeature.c

index 98ae03f8eedd58efcb34338eb72a609167865194..e156e7793a653ff0f7399be447fd1219938272fc 100644 (file)
 #define ID_AA64MMFR2_CNP_SHIFT         0
 
 /* id_aa64dfr0 */
+#define ID_AA64DFR0_PMSVER_SHIFT       32
 #define ID_AA64DFR0_CTX_CMPS_SHIFT     28
 #define ID_AA64DFR0_WRPS_SHIFT         20
 #define ID_AA64DFR0_BRPS_SHIFT         12
index d9714adb6a2a8cecc90acf659b5b4f726adb4c5f..e8f6dfba197312efb765f1c2adabfd2d88e2910f 100644 (file)
@@ -180,7 +180,8 @@ static const struct arm64_ftr_bits ftr_id_mmfr0[] = {
 };
 
 static const struct arm64_ftr_bits ftr_id_aa64dfr0[] = {
-       ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 32, 32, 0),
+       ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 36, 28, 0),
+       ARM64_FTR_BITS(FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64DFR0_PMSVER_SHIFT, 4, 0),
        ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_CTX_CMPS_SHIFT, 4, 0),
        ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_WRPS_SHIFT, 4, 0),
        ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64DFR0_BRPS_SHIFT, 4, 0),