thunderbolt: Limit Intel Barlow Ridge USB3 bandwidth
authorMika Westerberg <mika.westerberg@linux.intel.com>
Wed, 17 May 2023 07:45:53 +0000 (10:45 +0300)
committerMika Westerberg <mika.westerberg@linux.intel.com>
Fri, 16 Jun 2023 06:53:28 +0000 (09:53 +0300)
Intel Barlow Ridge discrete USB4 host router has the same limitation as
the previous generations so make sure the USB3 bandwidth limitation
quirk is applied to Barlow Ridge too.

Signed-off-by: Gil Fine <gil.fine@linux.intel.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
drivers/thunderbolt/nhi.h
drivers/thunderbolt/quirks.c

index c15a0c46c9cff5a60c248d9f41b1def07055f410..0f029ce758825e0a05c16def1b7255f9742e338b 100644 (file)
@@ -77,6 +77,8 @@ extern const struct tb_nhi_ops icl_nhi_ops;
 #define PCI_DEVICE_ID_INTEL_ADL_NHI1                   0x466d
 #define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI  0x5781
 #define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI  0x5784
+#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE 0x5786
+#define PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE 0x57a4
 #define PCI_DEVICE_ID_INTEL_MTL_M_NHI0                 0x7eb2
 #define PCI_DEVICE_ID_INTEL_MTL_P_NHI0                 0x7ec2
 #define PCI_DEVICE_ID_INTEL_MTL_P_NHI1                 0x7ec3
index 854d84148850396adcd89c21811623ce023a2156..488138a28ae13bde67b6ae4953f6fccfc17a3c29 100644 (file)
@@ -75,6 +75,14 @@ static const struct tb_quirk tb_quirks[] = {
                  quirk_usb3_maximum_bandwidth },
        { 0x8087, PCI_DEVICE_ID_INTEL_MTL_P_NHI1, 0x0000, 0x0000,
                  quirk_usb3_maximum_bandwidth },
+       { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_80G_NHI, 0x0000, 0x0000,
+                 quirk_usb3_maximum_bandwidth },
+       { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HOST_40G_NHI, 0x0000, 0x0000,
+                 quirk_usb3_maximum_bandwidth },
+       { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_80G_BRIDGE, 0x0000, 0x0000,
+                 quirk_usb3_maximum_bandwidth },
+       { 0x8087, PCI_DEVICE_ID_INTEL_BARLOW_RIDGE_HUB_40G_BRIDGE, 0x0000, 0x0000,
+                 quirk_usb3_maximum_bandwidth },
        /*
         * CLx is not supported on AMD USB4 Yellow Carp and Pink Sardine platforms.
         */