drm/amdgpu: pass ip_block in set_clockgating_state
authorBoyuan Zhang <boyuan.zhang@amd.com>
Mon, 7 Oct 2024 23:43:31 +0000 (19:43 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 Dec 2024 15:26:47 +0000 (10:26 -0500)
Pass ip_block instead of adev in set_clockgating_state() callback
functions. Modify set_clockgating_state()for all correspoding ip blocks.

v2: remove all changes for is_idle(), remove type casting

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
82 files changed:
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
drivers/gpu/drm/amd/amdgpu/cik.c
drivers/gpu/drm/amd/amdgpu/cik_ih.c
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/cz_ih.c
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
drivers/gpu/drm/amd/amdgpu/iceland_ih.c
drivers/gpu/drm/amd/amdgpu/ih_v6_0.c
drivers/gpu/drm/amd/amdgpu/ih_v6_1.c
drivers/gpu/drm/amd/amdgpu/ih_v7_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_5.c
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
drivers/gpu/drm/amd/amdgpu/navi10_ih.c
drivers/gpu/drm/amd/amdgpu/nv.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
drivers/gpu/drm/amd/amdgpu/si.c
drivers/gpu/drm/amd/amdgpu/si_dma.c
drivers/gpu/drm/amd/amdgpu/si_ih.c
drivers/gpu/drm/amd/amdgpu/soc15.c
drivers/gpu/drm/amd/amdgpu/soc21.c
drivers/gpu/drm/amd/amdgpu/soc24.c
drivers/gpu/drm/amd/amdgpu/tonga_ih.c
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
drivers/gpu/drm/amd/amdgpu/vega10_ih.c
drivers/gpu/drm/amd/amdgpu/vega20_ih.c
drivers/gpu/drm/amd/amdgpu/vi.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/include/amd_shared.h
drivers/gpu/drm/amd/pm/legacy-dpm/kv_dpm.c
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
drivers/gpu/drm/amd/pm/powerplay/amd_powerplay.c
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

index cdea150c801ee95fcb47204f185a4bc4a62fd4cf..deb0785350e8e9ad0fc3fb1f2ae97f51b174c1b9 100644 (file)
@@ -584,7 +584,7 @@ static bool acp_is_idle(void *handle)
        return true;
 }
 
-static int acp_set_clockgating_state(void *handle,
+static int acp_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                     enum amd_clockgating_state state)
 {
        return 0;
index 643a9a44e61415fe1a20da9988a9920f8bf715b9..312c507ef5f9921f7960957a6dae163365084eec 100644 (file)
@@ -2165,7 +2165,7 @@ int amdgpu_device_ip_set_clockgating_state(void *dev,
                if (!adev->ip_blocks[i].version->funcs->set_clockgating_state)
                        continue;
                r = adev->ip_blocks[i].version->funcs->set_clockgating_state(
-                       (void *)adev, state);
+                       &adev->ip_blocks[i], state);
                if (r)
                        DRM_ERROR("set_clockgating_state of IP block <%s> failed %d\n",
                                  adev->ip_blocks[i].version->funcs->name, r);
@@ -3137,7 +3137,7 @@ int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
                    adev->ip_blocks[i].version->type != AMD_IP_BLOCK_TYPE_JPEG &&
                    adev->ip_blocks[i].version->funcs->set_clockgating_state) {
                        /* enable clockgating to save power */
-                       r = adev->ip_blocks[i].version->funcs->set_clockgating_state((void *)adev,
+                       r = adev->ip_blocks[i].version->funcs->set_clockgating_state(&adev->ip_blocks[i],
                                                                                     state);
                        if (r) {
                                DRM_ERROR("set_clockgating_state(gate) of IP block <%s> failed %d\n",
index bc3b5bfc3423cc9cc70a3d4d7b244fb34cb393a2..d52f183939707acc08207fc97eac9165412ddf8d 100644 (file)
@@ -128,7 +128,7 @@ static bool isp_is_idle(void *handle)
        return true;
 }
 
-static int isp_set_clockgating_state(void *handle,
+static int isp_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                     enum amd_clockgating_state state)
 {
        return 0;
index 5760fa06197ab10e37553711966f3994ef805d4f..e0efbb6aecdad78064ad094065072df722d4867c 100644 (file)
@@ -3849,7 +3849,7 @@ int psp_config_sq_perfmon(struct psp_context *psp,
        return ret;
 }
 
-static int psp_set_clockgating_state(void *handle,
+static int psp_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                        enum amd_clockgating_state state)
 {
        return 0;
index 1bd804a8fdb581f36a2262ca6e70950c1daac57e..03308261f89434c989a1aa548420b7897533f166 100644 (file)
@@ -632,7 +632,7 @@ static bool amdgpu_vkms_is_idle(void *handle)
        return true;
 }
 
-static int amdgpu_vkms_set_clockgating_state(void *handle,
+static int amdgpu_vkms_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index fffca491e3a1e91ce446f63bee03f9b53215fe76..83cb9f565fe560a56441894c58fcaa34a15b2652 100644 (file)
@@ -646,7 +646,7 @@ static int vpe_ring_preempt_ib(struct amdgpu_ring *ring)
        return r;
 }
 
-static int vpe_set_clockgating_state(void *handle,
+static int vpe_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                     enum amd_clockgating_state state)
 {
        return 0;
index b5055181b050051b02bfc5cfaf99a4dfc5e8b2ae..08d6787893b37cb0592783927347b903540b11c2 100644 (file)
@@ -2161,7 +2161,7 @@ static int cik_common_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int cik_common_set_clockgating_state(void *handle,
+static int cik_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                            enum amd_clockgating_state state)
 {
        return 0;
index c49482793c12cf46e9bf9cec577df76c8c6e84e7..444563486769c0658ee1c6440aa551260e715f5b 100644 (file)
@@ -402,7 +402,7 @@ static int cik_ih_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int cik_ih_set_clockgating_state(void *handle,
+static int cik_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index 8da334c71419a404511ece7297882b3034abde95..1563e35da0fe2c6a09404526070ab1794c8652a6 100644 (file)
@@ -1189,11 +1189,11 @@ static int cik_sdma_process_illegal_inst_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int cik_sdma_set_clockgating_state(void *handle,
+static int cik_sdma_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        bool gate = false;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (state == AMD_CG_STATE_GATE)
                gate = true;
index 67554e3223869dd95fb7a06b7d4c2cb21a8c700d..82586b76aeda889e9f1804daf6e9d3c2994be8da 100644 (file)
@@ -398,7 +398,7 @@ static int cz_ih_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int cz_ih_set_clockgating_state(void *handle,
+static int cz_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        // TODO
index cd874f9e9a70bb656ba1eb9bebb84539f302c544..8bc997b664244b1d1df0ad5c7338b0578fd435c1 100644 (file)
@@ -3302,7 +3302,7 @@ static int dce_v10_0_hpd_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int dce_v10_0_set_clockgating_state(void *handle,
+static int dce_v10_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index ec908b524f61676dd5c5842faefa64440aee1d55..504939e3c0c3613a2ae052aa58b479ffa14d1938 100644 (file)
@@ -3434,7 +3434,7 @@ static int dce_v11_0_hpd_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int dce_v11_0_set_clockgating_state(void *handle,
+static int dce_v11_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index ee7b69a63f1710b323deadeeca0f30f5294a2cf9..a33e33743a93b037c477791e0cd8fca45ddda9b9 100644 (file)
@@ -3124,7 +3124,7 @@ static int dce_v6_0_hpd_irq(struct amdgpu_device *adev,
 
 }
 
-static int dce_v6_0_set_clockgating_state(void *handle,
+static int dce_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index cc4f986bd5339aba0f7e667abf652789eca855a8..aff58d56864af1895d979e7247abe0e95c83f929 100644 (file)
@@ -3212,7 +3212,7 @@ static int dce_v8_0_hpd_irq(struct amdgpu_device *adev,
 
 }
 
-static int dce_v8_0_set_clockgating_state(void *handle,
+static int dce_v8_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index d8c4e2132cc7b556fe40007681bcb23856e79e3d..f1b35b4a73ffb7d95cdc6ae5d54bec58808ddb3d 100644 (file)
@@ -8379,10 +8379,10 @@ static int gfx_v10_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
        return 0;
 }
 
-static int gfx_v10_0_set_clockgating_state(void *handle,
+static int gfx_v10_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index c4b62e1610891ded5b3ba401c6665f97abd14b2b..11347b857bc9ce36edff6cee99826be06261c60e 100644 (file)
@@ -5492,10 +5492,10 @@ static int gfx_v11_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
        return 0;
 }
 
-static int gfx_v11_0_set_clockgating_state(void *handle,
+static int gfx_v11_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index 1330476ba64bc8350bbaeac40be5fa17a814dc6a..6fc67d2171774e39074e159c1f1bfdafd64753ac 100644 (file)
@@ -4113,10 +4113,10 @@ static int gfx_v12_0_update_gfx_clock_gating(struct amdgpu_device *adev,
        return 0;
 }
 
-static int gfx_v12_0_set_clockgating_state(void *handle,
+static int gfx_v12_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index 2e1e8a49c66e502a47998bd864294c30eaa40612..81c185a8b3a0735d0d228863770b4a44c1dc0cff 100644 (file)
@@ -3373,11 +3373,11 @@ static int gfx_v6_0_priv_inst_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int gfx_v6_0_set_clockgating_state(void *handle,
+static int gfx_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        bool gate = false;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (state == AMD_CG_STATE_GATE)
                gate = true;
index 0124f86f8e63d8d2b48a700bf6c6f025612611d7..60931396f76b52a91e4f149e458438d308601ef7 100644 (file)
@@ -4846,11 +4846,11 @@ static int gfx_v7_0_priv_inst_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int gfx_v7_0_set_clockgating_state(void *handle,
+static int gfx_v7_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        bool gate = false;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (state == AMD_CG_STATE_GATE)
                gate = true;
index f2cc3f562d644c0bbdebe53ab2f5c59652e017e1..f15beb217b481ca44cd7a6a2ad1fcc3cff5880a0 100644 (file)
@@ -5980,10 +5980,10 @@ static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev,
        return 0;
 }
 
-static int gfx_v8_0_set_clockgating_state(void *handle,
+static int gfx_v8_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index b4e8bb4fcd7f3b9ff035b4168de6121022eb17fd..4e27528b7e571276dfdf45c02fec21f1b15fc093 100644 (file)
@@ -5275,10 +5275,10 @@ static int gfx_v9_0_set_powergating_state(struct amdgpu_ip_block *ip_block,
        return 0;
 }
 
-static int gfx_v9_0_set_clockgating_state(void *handle,
+static int gfx_v9_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index 98802fb7dd5fba6ccd8df1a0a049ae9dad2d9b5f..58541b93580ab9036fcfd4170e3b0a02699242ea 100644 (file)
@@ -2774,10 +2774,10 @@ static int gfx_v9_4_3_set_powergating_state(struct amdgpu_ip_block *ip_block,
        return 0;
 }
 
-static int gfx_v9_4_3_set_clockgating_state(void *handle,
+static int gfx_v9_4_3_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        int i, num_xcc;
 
        if (amdgpu_sriov_vf(adev))
index 73822631069002924d4d693168208ec0be5b3820..9bedca9a79c63c69123bddcaf8c82613d2524f55 100644 (file)
@@ -1088,11 +1088,11 @@ static int gmc_v10_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int gmc_v10_0_set_clockgating_state(void *handle,
+static int gmc_v10_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
        int r;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        /*
         * The issue mmhub can't disconnect from DF with MMHUB clock gating being disabled
index b73cd4f9df48b87e13422b010b1c5c131efdd685..72751ab4c766ec2e1f8de0d2d98d5c1e6ba62b51 100644 (file)
@@ -996,11 +996,11 @@ static int gmc_v11_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int gmc_v11_0_set_clockgating_state(void *handle,
+static int gmc_v11_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
        int r;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        r = adev->mmhub.funcs->set_clockgating(adev, state);
        if (r)
index 0ed26d24fc9bdb1cf8a5d80996957abc3911ee48..621769255ffac20219ab7a5a965fbe643bd3553e 100644 (file)
@@ -980,11 +980,11 @@ static int gmc_v12_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int gmc_v12_0_set_clockgating_state(void *handle,
+static int gmc_v12_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
        int r;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        r = adev->mmhub.funcs->set_clockgating(adev, state);
        if (r)
index 8575b0219e8db60a14da56882baaf46ad32aaefd..8e878ab44e76826956b543bc74ef9bc2013ba23d 100644 (file)
@@ -1094,7 +1094,7 @@ static int gmc_v6_0_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int gmc_v6_0_set_clockgating_state(void *handle,
+static int gmc_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index f39eb2d34703ba0d659dbec7321d671922704bc3..347bccd92696f8a75637537d5b8c54107f748a69 100644 (file)
@@ -1317,11 +1317,11 @@ static int gmc_v7_0_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int gmc_v7_0_set_clockgating_state(void *handle,
+static int gmc_v7_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        bool gate = false;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (state == AMD_CG_STATE_GATE)
                gate = true;
index 20a6d6e192eb753be7ed07061652865897192de0..29ce36038b3f3ec6453b381eb17f5ea8223be89e 100644 (file)
@@ -1658,10 +1658,10 @@ static void fiji_update_mc_light_sleep(struct amdgpu_device *adev,
        }
 }
 
-static int gmc_v8_0_set_clockgating_state(void *handle,
+static int gmc_v8_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index 0b052068b5002604e0c4f0a9cabf9e90ceed2de7..dc670cf836664b35214f0f861b2a0f2408e3abe1 100644 (file)
@@ -2544,10 +2544,10 @@ static int gmc_v9_0_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int gmc_v9_0_set_clockgating_state(void *handle,
+static int gmc_v9_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                        enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        adev->mmhub.funcs->set_clockgating(adev, state);
 
index be3a578596ae56ab8c4fa1b7511990fc91e2d642..8ac3d32822684ac401ff6c85ba713066e847bcc3 100644 (file)
@@ -392,7 +392,7 @@ static int iceland_ih_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int iceland_ih_set_clockgating_state(void *handle,
+static int iceland_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index b004dc88cbb0ec3597316f6a52c29c6a786ffc57..f8a4851644377b5239689f838158a08cd6c1baf6 100644 (file)
@@ -693,10 +693,10 @@ static void ih_v6_0_update_clockgating_state(struct amdgpu_device *adev,
        }
 }
 
-static int ih_v6_0_set_clockgating_state(void *handle,
+static int ih_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        ih_v6_0_update_clockgating_state(adev,
                                state == AMD_CG_STATE_GATE);
index 27d9d49657575d12af4a4a4121c539fe69037454..dd0042efceec3c07e734287d30ef818ae02c62cd 100644 (file)
@@ -674,10 +674,10 @@ static void ih_v6_1_update_clockgating_state(struct amdgpu_device *adev,
        return;
 }
 
-static int ih_v6_1_set_clockgating_state(void *handle,
+static int ih_v6_1_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        ih_v6_1_update_clockgating_state(adev,
                                state == AMD_CG_STATE_GATE);
index d37f5a813007ea4170f79e15d1367e7f7be8f1b6..8f9b15c171f36a35fad76ded4b2bf28ed5f88720 100644 (file)
@@ -664,10 +664,10 @@ static void ih_v7_0_update_clockgating_state(struct amdgpu_device *adev,
        return;
 }
 
-static int ih_v7_0_set_clockgating_state(void *handle,
+static int ih_v7_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        ih_v7_0_update_clockgating_state(adev,
                                state == AMD_CG_STATE_GATE);
index 6dc4a1d5c0f4c562a4f76cd12a6327c590fe98e4..7c9251c03815183683506faaced1c5e1dda9c32f 100644 (file)
@@ -675,14 +675,14 @@ static int jpeg_v2_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return ret;
 }
 
-static int jpeg_v2_0_set_clockgating_state(void *handle,
+static int jpeg_v2_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
-               if (!jpeg_v2_0_is_idle(handle))
+               if (!jpeg_v2_0_is_idle(adev))
                        return -EBUSY;
                jpeg_v2_0_enable_clock_gating(adev);
        } else {
index 105b81e88fd808179aac57977106269d4b5081c6..11f6af2646e760a6654f467babcd236b9cf17c6c 100644 (file)
@@ -518,10 +518,10 @@ static int jpeg_v2_5_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int jpeg_v2_5_set_clockgating_state(void *handle,
+static int jpeg_v2_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
        int i;
 
@@ -530,7 +530,7 @@ static int jpeg_v2_5_set_clockgating_state(void *handle,
                        continue;
 
                if (enable) {
-                       if (!jpeg_v2_5_is_idle(handle))
+                       if (!jpeg_v2_5_is_idle(adev))
                                return -EBUSY;
                        jpeg_v2_5_enable_clock_gating(adev, i);
                } else {
index 3ee2502361a2ffcce664cdcd95aae81414767c54..4eca65ea9053b81e641fac9856cd03ca48eec5cf 100644 (file)
@@ -466,14 +466,14 @@ static int jpeg_v3_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
                UVD_JRBC_STATUS__RB_JOB_DONE_MASK);
 }
 
-static int jpeg_v3_0_set_clockgating_state(void *handle,
+static int jpeg_v3_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = state == AMD_CG_STATE_GATE;
 
        if (enable) {
-               if (!jpeg_v3_0_is_idle(handle))
+               if (!jpeg_v3_0_is_idle(adev))
                        return -EBUSY;
                jpeg_v3_0_enable_clock_gating(adev);
        } else {
index 94f713f502eb4b28d56320ef490457161ac49596..0aef1f64afd02c39d0755218fbbd2f344cd98599 100644 (file)
@@ -635,14 +635,14 @@ static int jpeg_v4_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
                UVD_JRBC_STATUS__RB_JOB_DONE_MASK);
 }
 
-static int jpeg_v4_0_set_clockgating_state(void *handle,
+static int jpeg_v4_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = state == AMD_CG_STATE_GATE;
 
        if (enable) {
-               if (!jpeg_v4_0_is_idle(handle))
+               if (!jpeg_v4_0_is_idle(adev))
                        return -EBUSY;
                jpeg_v4_0_enable_clock_gating(adev);
        } else {
index 921acef89e960f3b27b39559abc85018d0511119..fd040b9cc93efc8d10e823658466673bd25858f5 100644 (file)
@@ -949,16 +949,16 @@ static int jpeg_v4_0_3_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return ret;
 }
 
-static int jpeg_v4_0_3_set_clockgating_state(void *handle,
+static int jpeg_v4_0_3_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = state == AMD_CG_STATE_GATE;
        int i;
 
        for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
                if (enable) {
-                       if (!jpeg_v4_0_3_is_idle(handle))
+                       if (!jpeg_v4_0_3_is_idle(adev))
                                return -EBUSY;
                        jpeg_v4_0_3_enable_clock_gating(adev, i);
                } else {
index 2240cf6600736f67eb4f5c71de7f71165478f403..6b3656984957346ba6991c3a602dcb7e50fbbd5c 100644 (file)
@@ -660,10 +660,10 @@ static int jpeg_v4_0_5_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int jpeg_v4_0_5_set_clockgating_state(void *handle,
+static int jpeg_v4_0_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
        int i;
 
@@ -672,7 +672,7 @@ static int jpeg_v4_0_5_set_clockgating_state(void *handle,
                        continue;
 
                if (enable) {
-                       if (!jpeg_v4_0_5_is_idle(handle))
+                       if (!jpeg_v4_0_5_is_idle(adev))
                                return -EBUSY;
 
                        jpeg_v4_0_5_enable_clock_gating(adev, i);
index 2a929d89f42e668795c54f61fbd74086d13dc4ce..87b3f91440e2e1ea6b5b04eb34103f4ac80a2c43 100644 (file)
@@ -560,14 +560,14 @@ static int jpeg_v5_0_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
                UVD_JRBC_STATUS__RB_JOB_DONE_MASK);
 }
 
-static int jpeg_v5_0_0_set_clockgating_state(void *handle,
+static int jpeg_v5_0_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
 
        if (enable) {
-               if (!jpeg_v5_0_0_is_idle(handle))
+               if (!jpeg_v5_0_0_is_idle(adev))
                        return -EBUSY;
                jpeg_v5_0_0_enable_clock_gating(adev);
        } else {
index f51b5dae3701f9341e7e81bafbecf7a085db579f..ebc2ab9c3c5c49a814e5ad558b78dd1620329920 100644 (file)
@@ -667,10 +667,10 @@ static void navi10_ih_update_clockgating_state(struct amdgpu_device *adev,
        }
 }
 
-static int navi10_ih_set_clockgating_state(void *handle,
+static int navi10_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        navi10_ih_update_clockgating_state(adev,
                                state == AMD_CG_STATE_GATE);
index c6d843cc9423ab823cbe5361e6450f559e17ccb5..47db483c35169443b73dc72a44e39bb4d30c79d9 100644 (file)
@@ -1039,10 +1039,10 @@ static bool nv_common_is_idle(void *handle)
        return true;
 }
 
-static int nv_common_set_clockgating_state(void *handle,
+static int nv_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index 0c32e614d8e0b0fd6939eb37b4473e4419e600dd..c6af318908e4bbaf2ea2e2f847a2214f20ad9184 100644 (file)
@@ -1080,7 +1080,7 @@ static int sdma_v2_4_process_illegal_inst_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int sdma_v2_4_set_clockgating_state(void *handle,
+static int sdma_v2_4_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        /* XXX handled via the smc on VI */
index 18f29e2be82894e33369d7851358cf33f6eb86f9..d438f2f7a40804f5362c5e32e86a700e1265c07d 100644 (file)
@@ -1483,10 +1483,10 @@ static void sdma_v3_0_update_sdma_medium_grain_light_sleep(
        }
 }
 
-static int sdma_v3_0_set_clockgating_state(void *handle,
+static int sdma_v3_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index a2f5f2be699b7df02d9e47a30416b2df81c564d9..defabd163d1714b8918e47196bbaf2b947d3b1aa 100644 (file)
@@ -2297,10 +2297,10 @@ static void sdma_v4_0_update_medium_grain_light_sleep(
        }
 }
 
-static int sdma_v4_0_set_clockgating_state(void *handle,
+static int sdma_v4_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index ced17a6fe77a82fd1fdb3514a63f3e077a004c61..e70460693ef2af3e8015d9bfa9d86ea6c34f76d0 100644 (file)
@@ -1531,7 +1531,7 @@ static int sdma_v4_4_2_hw_fini(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int sdma_v4_4_2_set_clockgating_state(void *handle,
+static int sdma_v4_4_2_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                             enum amd_clockgating_state state);
 
 static int sdma_v4_4_2_suspend(struct amdgpu_ip_block *ip_block)
@@ -1539,7 +1539,7 @@ static int sdma_v4_4_2_suspend(struct amdgpu_ip_block *ip_block)
        struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_in_reset(adev))
-               sdma_v4_4_2_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);
+               sdma_v4_4_2_set_clockgating_state(ip_block, AMD_CG_STATE_UNGATE);
 
        return sdma_v4_4_2_hw_fini(ip_block);
 }
@@ -1874,10 +1874,10 @@ static void sdma_v4_4_2_inst_update_medium_grain_clock_gating(
        }
 }
 
-static int sdma_v4_4_2_set_clockgating_state(void *handle,
+static int sdma_v4_4_2_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        uint32_t inst_mask;
 
        if (amdgpu_sriov_vf(adev))
index 07e9a3eec7e5372ca319fc1fe8655df5e08d83f2..23599a5d4a124b69b03a6f0c4b96766f549ca73e 100644 (file)
@@ -1853,10 +1853,10 @@ static void sdma_v5_0_update_medium_grain_light_sleep(struct amdgpu_device *adev
        }
 }
 
-static int sdma_v5_0_set_clockgating_state(void *handle,
+static int sdma_v5_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index d2e9a4db8b021ccff1dbe5f3c1b368aef4d71d39..10352cfddca5c3e12ea41ddeaa82829476c0f627 100644 (file)
@@ -1812,10 +1812,10 @@ static void sdma_v5_2_update_medium_grain_light_sleep(struct amdgpu_device *adev
        }
 }
 
-static int sdma_v5_2_set_clockgating_state(void *handle,
+static int sdma_v5_2_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index f48c6aeb2af2a7be524d1cc1777b1acfac7c9557..b14b6d344acecb3b5985244b64b0e0ea10ddc3fe 100644 (file)
@@ -1601,7 +1601,7 @@ static int sdma_v6_0_process_illegal_inst_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int sdma_v6_0_set_clockgating_state(void *handle,
+static int sdma_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
        return 0;
index 1a5fc7bc7289c4279990fc1a0c6e23a7ef4d1cae..eb35ec9f3da2b823732fa270449aacf4f9b42be7 100644 (file)
@@ -1524,7 +1524,7 @@ static int sdma_v7_0_process_illegal_inst_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int sdma_v7_0_set_clockgating_state(void *handle,
+static int sdma_v7_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
        return 0;
index e32615630cca6539c876010921de1003a09e962f..77ef7da2e4fe43fc028402b32d9136b4a45bb51f 100644 (file)
@@ -2649,7 +2649,7 @@ static bool si_common_is_idle(void *handle)
        return true;
 }
 
-static int si_common_set_clockgating_state(void *handle,
+static int si_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                            enum amd_clockgating_state state)
 {
        return 0;
index 4b278904cfd99b1e02a44d5168023dc64a5c80fa..9f62b2b7fe0ea9162ca04d3103be230bc1bd756d 100644 (file)
@@ -629,13 +629,13 @@ static int si_dma_process_trap_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-static int si_dma_set_clockgating_state(void *handle,
+static int si_dma_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        u32 orig, data, offset;
        int i;
        bool enable;
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        enable = (state == AMD_CG_STATE_GATE);
 
index ec756d24aaa7aac9a15d099c7b6286cba82f3441..a32b6243c1f8732e3cfac289be009b45ef53c3a0 100644 (file)
@@ -263,7 +263,7 @@ static int si_ih_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int si_ih_set_clockgating_state(void *handle,
+static int si_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index 1eb6a226ff10becb7f6f9f9e28c3583dcf768fbe..5721ccda79058bd0ce20b344c55de866bd1a434d 100644 (file)
@@ -1385,10 +1385,10 @@ static void soc15_update_drm_light_sleep(struct amdgpu_device *adev, bool enable
                WREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_LIGHT_SLEEP_CTRL), data);
 }
 
-static int soc15_common_set_clockgating_state(void *handle,
+static int soc15_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                            enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index b270037f0b9bd23feea2875b7feb3c3b331f6155..62ad67d0b598f576ff5af435675622745eb36af9 100644 (file)
@@ -928,10 +928,10 @@ static bool soc21_common_is_idle(void *handle)
        return true;
 }
 
-static int soc21_common_set_clockgating_state(void *handle,
+static int soc21_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) {
        case IP_VERSION(4, 3, 0):
index ee96d9e303a88d4963c36849b7989d515c964219..eda03d40d76589e49ebaaf6bf3bb96bde40bf7fc 100644 (file)
@@ -522,10 +522,10 @@ static bool soc24_common_is_idle(void *handle)
        return true;
 }
 
-static int soc24_common_set_clockgating_state(void *handle,
+static int soc24_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                              enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        switch (amdgpu_ip_version(adev, NBIO_HWIP, 0)) {
        case IP_VERSION(6, 3, 1):
index 7c02eb0e1540f7c7a9d03f5d94243c6ac8e2e7b4..0968e551f7b5f1e86283bb192ca493da645a1638 100644 (file)
@@ -448,7 +448,7 @@ static int tonga_ih_soft_reset(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int tonga_ih_set_clockgating_state(void *handle,
+static int tonga_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index c66fe0c8d5e9e449a68e9cdbb50ac07f65e970ff..5830e799c0a363f9aa128417e36538344a58015d 100644 (file)
@@ -790,7 +790,7 @@ static int uvd_v3_1_soft_reset(struct amdgpu_ip_block *ip_block)
        return uvd_v3_1_start(adev);
 }
 
-static int uvd_v3_1_set_clockgating_state(void *handle,
+static int uvd_v3_1_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index 1f3da607c0d62613e53bc19cd0d138d0784c0350..f93079e092158311eff5e3c3c8b6c2699ce8bc0b 100644 (file)
@@ -44,7 +44,7 @@ static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev);
 static void uvd_v4_2_set_irq_funcs(struct amdgpu_device *adev);
 static int uvd_v4_2_start(struct amdgpu_device *adev);
 static void uvd_v4_2_stop(struct amdgpu_device *adev);
-static int uvd_v4_2_set_clockgating_state(void *handle,
+static int uvd_v4_2_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                enum amd_clockgating_state state);
 static void uvd_v4_2_set_dcm(struct amdgpu_device *adev,
                             bool sw_mode);
@@ -708,7 +708,7 @@ static int uvd_v4_2_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int uvd_v4_2_set_clockgating_state(void *handle,
+static int uvd_v4_2_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index 50577cc79dcb5285db1a5fe24f20ee65867ea4cf..050a0f30939084edd9da92efc0453ce5e613b431 100644 (file)
@@ -42,7 +42,7 @@ static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev);
 static void uvd_v5_0_set_irq_funcs(struct amdgpu_device *adev);
 static int uvd_v5_0_start(struct amdgpu_device *adev);
 static void uvd_v5_0_stop(struct amdgpu_device *adev);
-static int uvd_v5_0_set_clockgating_state(void *handle,
+static int uvd_v5_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state);
 static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev,
                                 bool enable);
@@ -155,7 +155,7 @@ static int uvd_v5_0_hw_init(struct amdgpu_ip_block *ip_block)
        int r;
 
        amdgpu_asic_set_uvd_clocks(adev, 10000, 10000);
-       uvd_v5_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);
+       uvd_v5_0_set_clockgating_state(ip_block, AMD_CG_STATE_UNGATE);
        uvd_v5_0_enable_mgcg(adev, true);
 
        r = amdgpu_ring_test_helper(ring);
@@ -790,16 +790,11 @@ static void uvd_v5_0_enable_mgcg(struct amdgpu_device *adev,
        }
 }
 
-static int uvd_v5_0_set_clockgating_state(void *handle,
+static int uvd_v5_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
-       struct amdgpu_ip_block *ip_block;
-
-       ip_block = amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_UVD);
-       if (!ip_block)
-               return -EINVAL;
 
        if (enable) {
                /* wait for STATUS to clear */
index 4f5dc46802e20cc98eb740c6d59f82622e3ee6e1..d9d036ee51fb7f95dd86041010957530ebbbba47 100644 (file)
@@ -48,7 +48,7 @@ static void uvd_v6_0_set_irq_funcs(struct amdgpu_device *adev);
 static int uvd_v6_0_start(struct amdgpu_device *adev);
 static void uvd_v6_0_stop(struct amdgpu_device *adev);
 static void uvd_v6_0_set_sw_clock_gating(struct amdgpu_device *adev);
-static int uvd_v6_0_set_clockgating_state(void *handle,
+static int uvd_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state);
 static void uvd_v6_0_enable_mgcg(struct amdgpu_device *adev,
                                 bool enable);
@@ -467,7 +467,7 @@ static int uvd_v6_0_hw_init(struct amdgpu_ip_block *ip_block)
        int i, r;
 
        amdgpu_asic_set_uvd_clocks(adev, 10000, 10000);
-       uvd_v6_0_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);
+       uvd_v6_0_set_clockgating_state(ip_block, AMD_CG_STATE_UNGATE);
        uvd_v6_0_enable_mgcg(adev, true);
 
        r = amdgpu_ring_test_helper(ring);
@@ -1450,17 +1450,12 @@ static void uvd_v6_0_enable_mgcg(struct amdgpu_device *adev,
        }
 }
 
-static int uvd_v6_0_set_clockgating_state(void *handle,
+static int uvd_v6_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-       struct amdgpu_ip_block *ip_block;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
 
-       ip_block = amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_UVD);
-       if (!ip_block)
-               return -EINVAL;
-
        if (enable) {
                /* wait for STATUS to clear */
                if (uvd_v6_0_wait_for_idle(ip_block))
index 3c8ab8698af8335e36c6f48076fed2b77a679102..9d237b5937fb04a5b3c06387a64297b65ae94703 100644 (file)
@@ -1511,7 +1511,7 @@ static int uvd_v7_0_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int uvd_v7_0_set_clockgating_state(void *handle,
+static int uvd_v7_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        /* needed for driver unload*/
index 552866990db2f9a2bbbb877fceb863985c839299..c633b7ff294384aac994707d4d03be00538cd436 100644 (file)
@@ -578,13 +578,13 @@ static int vce_v2_0_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int vce_v2_0_set_clockgating_state(void *handle,
+static int vce_v2_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        bool gate = false;
        bool sw_cg = false;
 
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (state == AMD_CG_STATE_GATE) {
                gate = true;
index 6f4a2476b9fd338b4a7f92dbe12a90a9794b9396..f8bddcd19b6881419e3d8cafd155ee5cb9be4971 100644 (file)
@@ -65,7 +65,7 @@ static void vce_v3_0_mc_resume(struct amdgpu_device *adev, int idx);
 static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev);
 static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev);
 static int vce_v3_0_wait_for_idle(struct amdgpu_ip_block *ip_block);
-static int vce_v3_0_set_clockgating_state(void *handle,
+static int vce_v3_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state);
 /**
  * vce_v3_0_ring_get_rptr - get read pointer
@@ -497,7 +497,7 @@ static int vce_v3_0_hw_fini(struct amdgpu_ip_block *ip_block)
                return r;
 
        vce_v3_0_stop(adev);
-       return vce_v3_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);
+       return vce_v3_0_set_clockgating_state(ip_block, AMD_CG_STATE_GATE);
 }
 
 static int vce_v3_0_suspend(struct amdgpu_ip_block *ip_block)
@@ -760,10 +760,10 @@ static int vce_v3_0_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int vce_v3_0_set_clockgating_state(void *handle,
+static int vce_v3_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
        int i;
 
index 04bfa3b59f7580bde55e4c4a140da7c1c3650965..335bda64ff5bc21d1ddffa118d0c7930fa918b2f 100644 (file)
@@ -684,7 +684,7 @@ static void vce_v4_0_mc_resume(struct amdgpu_device *adev)
                        ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);
 }
 
-static int vce_v4_0_set_clockgating_state(void *handle,
+static int vce_v4_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        /* needed for driver unload*/
index 32b0159953f3533fb43c952ebadb4ee123146b01..00d9fdd2869ea5c7ab14575fe5bfd4467e5b5c9b 100644 (file)
@@ -1395,15 +1395,15 @@ static int vcn_v1_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return ret;
 }
 
-static int vcn_v1_0_set_clockgating_state(void *handle,
+static int vcn_v1_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
 
        if (enable) {
                /* wait for STATUS to clear */
-               if (!vcn_v1_0_is_idle(handle))
+               if (!vcn_v1_0_is_idle(adev))
                        return -EBUSY;
                vcn_v1_0_enable_clock_gating(adev);
        } else {
index 798d06563c65a1a94330299625595f82cc6fd47b..de4067713d7b5ba7ad8e29af8d0617013ac44064 100644 (file)
@@ -1335,10 +1335,10 @@ static int vcn_v2_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return ret;
 }
 
-static int vcn_v2_0_set_clockgating_state(void *handle,
+static int vcn_v2_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
 
        if (amdgpu_sriov_vf(adev))
@@ -1346,7 +1346,7 @@ static int vcn_v2_0_set_clockgating_state(void *handle,
 
        if (enable) {
                /* wait for STATUS to clear */
-               if (!vcn_v2_0_is_idle(handle))
+               if (!vcn_v2_0_is_idle(adev))
                        return -EBUSY;
                vcn_v2_0_enable_clock_gating(adev);
        } else {
index d00406e057d7a4692ce4763c2a438f1baf7959ee..08f43a281a7fd4468bb51fd3010be6c91356b71c 100644 (file)
@@ -1782,6 +1782,7 @@ static bool vcn_v2_5_is_idle(void *handle)
        for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
                if (adev->vcn.harvest_config & (1 << i))
                        continue;
+
                ret &= (RREG32_SOC15(VCN, i, mmUVD_STATUS) == UVD_STATUS__IDLE);
        }
 
@@ -1805,17 +1806,17 @@ static int vcn_v2_5_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return ret;
 }
 
-static int vcn_v2_5_set_clockgating_state(void *handle,
+static int vcn_v2_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE);
 
        if (amdgpu_sriov_vf(adev))
                return 0;
 
        if (enable) {
-               if (!vcn_v2_5_is_idle(handle))
+               if (!vcn_v2_5_is_idle(adev))
                        return -EBUSY;
                vcn_v2_5_enable_clock_gating(adev);
        } else {
index d761bc7c31bce3c324f9d3f1179826ebacb9da38..6002990d917b68faf9b0d809e0615564c93ff62e 100644 (file)
@@ -2136,10 +2136,10 @@ static int vcn_v3_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return ret;
 }
 
-static int vcn_v3_0_set_clockgating_state(void *handle,
+static int vcn_v3_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = state == AMD_CG_STATE_GATE;
        int i;
 
index 53338f71d372cc1f2cf864067317d492cf7e66fd..fca223edd38dcd20ea19f76db010671121e9079b 100644 (file)
@@ -2016,9 +2016,10 @@ static int vcn_v4_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
  *
  * Set VCN block clockgating state
  */
-static int vcn_v4_0_set_clockgating_state(void *handle, enum amd_clockgating_state state)
+static int vcn_v4_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
+                                         enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = state == AMD_CG_STATE_GATE;
        int i;
 
index 53b4a3a2890b747a523ff9295cd6d3ace0aec6d4..94c3bc079cd9b8c5f7d32634d45df87075d5991b 100644 (file)
@@ -1625,10 +1625,10 @@ static int vcn_v4_0_3_wait_for_idle(struct amdgpu_ip_block *ip_block)
  *
  * Set VCN block clockgating state
  */
-static int vcn_v4_0_3_set_clockgating_state(void *handle,
+static int vcn_v4_0_3_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = state == AMD_CG_STATE_GATE;
        int i;
 
index 13c0fc9f98943886afc9408f890fd0f412b30922..f24e1eef6606057c163d576fcfd00f4d942db299 100644 (file)
@@ -1501,9 +1501,10 @@ static int vcn_v4_0_5_wait_for_idle(struct amdgpu_ip_block *ip_block)
  *
  * Set VCN block clockgating state
  */
-static int vcn_v4_0_5_set_clockgating_state(void *handle, enum amd_clockgating_state state)
+static int vcn_v4_0_5_set_clockgating_state(struct amdgpu_ip_block *ip_block,
+                                         enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
        int i;
 
index 99d60088a24c1bbb1206e8331c3b85a757b0e608..dea92c826b80c50c615850bb3d1872a2be32286d 100644 (file)
@@ -1238,9 +1238,10 @@ static int vcn_v5_0_0_wait_for_idle(struct amdgpu_ip_block *ip_block)
  *
  * Set VCN block clockgating state
  */
-static int vcn_v5_0_0_set_clockgating_state(void *handle, enum amd_clockgating_state state)
+static int vcn_v5_0_0_set_clockgating_state(struct amdgpu_ip_block *ip_block,
+                                         enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
        bool enable = (state == AMD_CG_STATE_GATE) ? true : false;
        int i;
 
index 039f1ae2df023879d6f75a45da3cc39c4d74bfd2..378da889e0754e9d3c06969519b7163c4c3c9f51 100644 (file)
@@ -605,10 +605,10 @@ static void vega10_ih_update_clockgating_state(struct amdgpu_device *adev,
        }
 }
 
-static int vega10_ih_set_clockgating_state(void *handle,
+static int vega10_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        vega10_ih_update_clockgating_state(adev,
                                state == AMD_CG_STATE_GATE);
index a8e88c9f6ae52ccad5c92578ba803eff29cbfb00..87a530bbc09240ddae6f726d9766fc2537cd8f9c 100644 (file)
@@ -697,10 +697,10 @@ static void vega20_ih_update_clockgating_state(struct amdgpu_device *adev,
        }
 }
 
-static int vega20_ih_set_clockgating_state(void *handle,
+static int vega20_ih_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        vega20_ih_update_clockgating_state(adev,
                                state == AMD_CG_STATE_GATE);
index 5b945d4d81b7a1700488bbf338791408a5f3f529..06615f1603317310d03c2a9115ebf503a01c1e6f 100644 (file)
@@ -1945,10 +1945,10 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
        return 0;
 }
 
-static int vi_common_set_clockgating_state(void *handle,
+static int vi_common_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                           enum amd_clockgating_state state)
 {
-       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+       struct amdgpu_device *adev = ip_block->adev;
 
        if (amdgpu_sriov_vf(adev))
                return 0;
index e27a5667852d941add5a5219e15fa6307c689cbd..cb869f5e99059ff2f61f221946eaacc615ca0832 100644 (file)
@@ -955,7 +955,7 @@ static void dm_dmub_outbox1_low_irq(void *interrupt_params)
        }
 }
 
-static int dm_set_clockgating_state(void *handle,
+static int dm_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                  enum amd_clockgating_state state)
 {
        return 0;
index 0f20abbfd38195f03e2ee7a2e67b05a6cecca8a2..98d9e840b0e2a0b197529ddbe3b79c81438c32f5 100644 (file)
@@ -401,7 +401,7 @@ struct amd_ip_funcs {
        int (*pre_soft_reset)(struct amdgpu_ip_block *ip_block);
        int (*soft_reset)(struct amdgpu_ip_block *ip_block);
        int (*post_soft_reset)(struct amdgpu_ip_block *ip_block);
-       int (*set_clockgating_state)(void *handle,
+       int (*set_clockgating_state)(struct amdgpu_ip_block *ip_block,
                                     enum amd_clockgating_state state);
        int (*set_powergating_state)(struct amdgpu_ip_block *ip_block,
                                     enum amd_powergating_state state);
index bb8b0799ab7c8107b2e4a844335935a43d5d1a76..67a8e22b1126d9eabaefe6d66809d63da9212612 100644 (file)
@@ -3177,7 +3177,7 @@ static int kv_dpm_process_interrupt(struct amdgpu_device *adev,
        return 0;
 }
 
-static int kv_dpm_set_clockgating_state(void *handle,
+static int kv_dpm_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index ed8f755e9ff6687f8746a336e968fc3b6b717062..2bed85ba835ee7e4a983990cfa85e5152dae35fc 100644 (file)
@@ -7849,7 +7849,7 @@ static int si_dpm_wait_for_idle(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
-static int si_dpm_set_clockgating_state(void *handle,
+static int si_dpm_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                        enum amd_clockgating_state state)
 {
        return 0;
index a3d1c5aa3b3ee04713e2f6d9216a2ef2e7d0fc93..686345f75f2645aa8a1d24af5171f06f4cf1a3e5 100644 (file)
@@ -267,7 +267,7 @@ static int pp_resume(struct amdgpu_ip_block *ip_block)
        return hwmgr_resume(hwmgr);
 }
 
-static int pp_set_clockgating_state(void *handle,
+static int pp_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                          enum amd_clockgating_state state)
 {
        return 0;
index cb89656864aa0fbd21bed270cdb561a2b7e08934..59d795c02beb58b868275e3ba5a2b7159254de72 100644 (file)
@@ -2202,7 +2202,7 @@ static int smu_display_configuration_change(void *handle,
        return 0;
 }
 
-static int smu_set_clockgating_state(void *handle,
+static int smu_set_clockgating_state(struct amdgpu_ip_block *ip_block,
                                     enum amd_clockgating_state state)
 {
        return 0;