drm/i915: move de_irq_mask to display substruct

The info is related to display, and should be placed under
i915->display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/733fc96df9153c6af8979d9b23d3aa3734937b56.1712599670.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 68aee44b48224b8a74b273c4fba2d77e9b9c1b72..7a70b162b015eb27081539933a33ed997a31bc70 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -452,6 +452,8 @@ struct intel_display {
 
                /* For i915gm/i945gm vblank irq workaround */
                u8 vblank_enabled;
+
+               u32 de_irq_mask[I915_MAX_PIPES];
        } irq;
 
        struct {

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index e9fcdac90efdc32b84583da2dea32135fbb82a7d..9b9548ae9797b2f4554ea603045f6c7edf578940 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -117,13 +117,14 @@ static void bdw_update_pipe_irq(struct drm_i915_private *dev_priv,
        if (drm_WARN_ON(&dev_priv->drm, !intel_irqs_enabled(dev_priv)))
                return;
 
-       new_val = dev_priv->de_irq_mask[pipe];
+       new_val = dev_priv->display.irq.de_irq_mask[pipe];
        new_val &= ~interrupt_mask;
        new_val |= (~enabled_irq_mask & interrupt_mask);
 
-       if (new_val != dev_priv->de_irq_mask[pipe]) {
-               dev_priv->de_irq_mask[pipe] = new_val;
-               intel_uncore_write(&dev_priv->uncore, GEN8_DE_PIPE_IMR(pipe), dev_priv->de_irq_mask[pipe]);
+       if (new_val != dev_priv->display.irq.de_irq_mask[pipe]) {
+               dev_priv->display.irq.de_irq_mask[pipe] = new_val;
+               intel_uncore_write(&dev_priv->uncore, GEN8_DE_PIPE_IMR(pipe),
+                                  dev_priv->display.irq.de_irq_mask[pipe]);
                intel_uncore_posting_read(&dev_priv->uncore, GEN8_DE_PIPE_IMR(pipe));
        }
 }
@@ -1497,8 +1498,8 @@ void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
 
        for_each_pipe_masked(dev_priv, pipe, pipe_mask)
                GEN8_IRQ_INIT_NDX(uncore, DE_PIPE, pipe,
-                                 dev_priv->de_irq_mask[pipe],
-                                 ~dev_priv->de_irq_mask[pipe] | extra_ier);
+                                 dev_priv->display.irq.de_irq_mask[pipe],
+                                 ~dev_priv->display.irq.de_irq_mask[pipe] | extra_ier);
 
        spin_unlock_irq(&dev_priv->irq_lock);
 }
@@ -1694,12 +1695,12 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
        }
 
        for_each_pipe(dev_priv, pipe) {
-               dev_priv->de_irq_mask[pipe] = ~de_pipe_masked;
+               dev_priv->display.irq.de_irq_mask[pipe] = ~de_pipe_masked;
 
                if (intel_display_power_is_enabled(dev_priv,
                                                   POWER_DOMAIN_PIPE(pipe)))
                        GEN8_IRQ_INIT_NDX(uncore, DE_PIPE, pipe,
-                                         dev_priv->de_irq_mask[pipe],
+                                         dev_priv->display.irq.de_irq_mask[pipe],
                                          de_pipe_enables);
        }
 

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b3daca57f32c510623c443866309268abf579fb3..41add82ca36987e9c3bbcc7cf8f781289435f014 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -240,10 +240,7 @@ struct drm_i915_private {
        struct pm_qos_request sb_qos;
 
        /** Cached value of IMR to avoid reads in updating the bitfield */
-       union {
-               u32 irq_mask;
-               u32 de_irq_mask[I915_MAX_PIPES];
-       };
+       u32 irq_mask;
        u32 pipestat_irq_mask[I915_MAX_PIPES];
 
        bool preserve_bios_swizzle;

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index a8844a147cdfb4d0de746bad77365950f0638133..a5af0c1269fc97656e085bceca235bc16160b8b2 100644 (file)
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -497,11 +497,8 @@ struct xe_device {
        /* For pcode */
        struct mutex sb_lock;
 
-       union {
-               /* only to allow build, not used functionally */
-               u32 irq_mask;
-               u32 de_irq_mask[I915_MAX_PIPES];
-       };
+       /* only to allow build, not used functionally */
+       u32 irq_mask;
        u32 pipestat_irq_mask[I915_MAX_PIPES];
 
        u32 enabled_irq_mask;