drm/i915/fbc: Bump ivb FBC max surface size to 4kx4k

IVB Bspec says:
"Frame Buffer Compression is only supported with memory surfaces of 4096 lines
or less and pipe source sizes of 4096 pixels by 2048 lines or less. "

so seems like we should be able to bump the offset+size limit to
at least 4kx4k. Make it so.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231117171833.25816-3-ville.syrjala@linux.intel.com
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 0ac222eaddd2a4abea6703c9ba7e27222289c950..63f389a1707d9bc85c26e9bf0edbbc92b3b019b1 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1034,7 +1034,7 @@ static bool intel_fbc_hw_tracking_covers_screen(const struct intel_plane_state *
        } else if (DISPLAY_VER(i915) >= 10) {
                max_w = 5120;
                max_h = 4096;
-       } else if (DISPLAY_VER(i915) >= 8 || IS_HASWELL(i915)) {
+       } else if (DISPLAY_VER(i915) >= 7) {
                max_w = 4096;
                max_h = 4096;
        } else if (IS_G4X(i915) || DISPLAY_VER(i915) >= 5) {