ath10k: Add hw param for 64-bit address support
authorRakesh Pillai <pillair@qti.qualcomm.com>
Thu, 21 Dec 2017 09:00:50 +0000 (14:30 +0530)
committerKalle Valo <kvalo@qca.qualcomm.com>
Wed, 27 Dec 2017 10:05:26 +0000 (12:05 +0200)
WCN3990 target supports 37-bit addressing mode. In order
to accommodate extended address support, add hw param to
indicate if the target supports addressing above 32-bits.

Signed-off-by: Rakesh Pillai <pillair@qti.qualcomm.com>
Signed-off-by: Govind Singh <govinds@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/core.c
drivers/net/wireless/ath/ath10k/hw.h

index 6d065f8d7f78c90f83314026a0b2d2e99fc09dde..42b7c7d53c24dcf2308649098445fb16aaed9b15 100644 (file)
@@ -78,6 +78,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA9887_HW_1_0_VERSION,
@@ -105,6 +106,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA6174_HW_2_1_VERSION,
@@ -131,6 +133,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA6174_HW_2_1_VERSION,
@@ -157,6 +160,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA6174_HW_3_0_VERSION,
@@ -183,6 +187,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA6174_HW_3_2_VERSION,
@@ -212,6 +217,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -244,6 +250,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA9984_HW_1_0_DEV_VERSION,
@@ -281,6 +288,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA9888_HW_2_0_DEV_VERSION,
@@ -317,6 +325,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA9377_HW_1_0_DEV_VERSION,
@@ -343,6 +352,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA9377_HW_1_1_DEV_VERSION,
@@ -371,6 +381,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = QCA4019_HW_1_0_DEV_VERSION,
@@ -404,6 +415,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_TLV_NUM_PEERS,
                .ast_skid_limit = 0x10,
                .num_wds_entries = 0x20,
+               .target_64bit = false,
        },
        {
                .id = WCN3990_HW_1_0_DEV_VERSION,
@@ -422,6 +434,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
                .num_peers = TARGET_HL_10_TLV_NUM_PEERS,
                .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT,
                .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES,
+               .target_64bit = true,
        },
 };
 
index 90ad39bdeec43282904e9a5a1b436c0a48c187ee..5d243f3c319625fd64081bec8e7f0b4bcab22b73 100644 (file)
@@ -561,6 +561,9 @@ struct ath10k_hw_params {
        u32 num_peers;
        u32 ast_skid_limit;
        u32 num_wds_entries;
+
+       /* Targets supporting physical addressing capability above 32-bits */
+       bool target_64bit;
 };
 
 struct htt_rx_desc;