net/mlx5: DR, Use the right size when writing partial STE into HW

In these cases we need to update only the ctrl area of the STE.
So it is better to write only the control 32B and avoid copying
the unneeded reduced 48B (control 32B + tag 16B).

Signed-off-by: Erez Shitrit <erezsh@nvidia.com>
Signed-off-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
index ddcb7017e1216617c20baa5d7456af4e1c57fab3..fcea2a21abe9cbcfe04de342f9d5a9e21688f18d 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
@@ -30,7 +30,7 @@ static int dr_rule_append_to_miss_list(struct mlx5dr_ste_ctx *ste_ctx,
                                 mlx5dr_ste_get_icm_addr(new_last_ste));
        list_add_tail(&new_last_ste->miss_list_node, miss_list);
 
-       mlx5dr_send_fill_and_append_ste_send_info(last_ste, DR_STE_SIZE_REDUCED,
+       mlx5dr_send_fill_and_append_ste_send_info(last_ste, DR_STE_SIZE_CTRL,
                                                  0, last_ste->hw_ste,
                                                  ste_info_last, send_list, true);
 
@@ -110,10 +110,14 @@ dr_rule_handle_one_ste_in_update_list(struct mlx5dr_ste_send_info *ste_info,
                                       ste_info->size, ste_info->offset);
        if (ret)
                goto out;
-       /* Copy data to ste, only reduced size, the last 16B (mask)
+
+       /* Copy data to ste, only reduced size or control, the last 16B (mask)
         * is already written to the hw.
         */
-       memcpy(ste_info->ste->hw_ste, ste_info->data, DR_STE_SIZE_REDUCED);
+       if (ste_info->size == DR_STE_SIZE_CTRL)
+               memcpy(ste_info->ste->hw_ste, ste_info->data, DR_STE_SIZE_CTRL);
+       else
+               memcpy(ste_info->ste->hw_ste, ste_info->data, DR_STE_SIZE_REDUCED);
 
 out:
        kfree(ste_info);
@@ -456,7 +460,7 @@ dr_rule_rehash_htbl(struct mlx5dr_rule *rule,
                ste_to_update = cur_htbl->pointing_ste;
        }
 
-       mlx5dr_send_fill_and_append_ste_send_info(ste_to_update, DR_STE_SIZE_REDUCED,
+       mlx5dr_send_fill_and_append_ste_send_info(ste_to_update, DR_STE_SIZE_CTRL,
                                                  0, ste_to_update->hw_ste, ste_info,
                                                  update_list, false);
 

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
index 0f318f409c91d40ba465079ebc39aad16f0614cc..e21b61030e3524a0931fa36a212e52999dc69134 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
@@ -264,7 +264,7 @@ static void dr_ste_remove_middle_ste(struct mlx5dr_ste_ctx *ste_ctx,
        miss_addr = ste_ctx->get_miss_addr(ste->hw_ste);
        ste_ctx->set_miss_addr(prev_ste->hw_ste, miss_addr);
 
-       mlx5dr_send_fill_and_append_ste_send_info(prev_ste, DR_STE_SIZE_REDUCED, 0,
+       mlx5dr_send_fill_and_append_ste_send_info(prev_ste, DR_STE_SIZE_CTRL, 0,
                                                  prev_ste->hw_ste, ste_info,
                                                  send_ste_list, true /* Copy data*/);