MFD: ti_tscadc: ADC Clock check not required
authorPatil, Rachna <rachna@ti.com>
Sat, 20 Jul 2013 16:27:35 +0000 (17:27 +0100)
committerSamuel Ortiz <sameo@linux.intel.com>
Wed, 31 Jul 2013 00:04:34 +0000 (02:04 +0200)
ADC is ideally expected to work at a frequency of 3MHz.
The present code had a check, which returned error if the frequency
went below the threshold  value. But since AM335x supports various
working frequencies, this check is not required.
Now the code just uses the internal ADC clock divider to set the ADC
frequency w.r.t the sys clock.

Signed-off-by: Patil, Rachna <rachna@ti.com>
Signed-off-by: Zubair Lutfullah <zubair.lutfullah@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/mfd/ti_am335x_tscadc.c
include/linux/mfd/ti_am335x_tscadc.h

index b003a16ba227384d8deddb861d89515a0f29b525..e0852ecbc76718f9f497fe4a2fe5d1f7e369325e 100644 (file)
@@ -197,11 +197,7 @@ static     int ti_tscadc_probe(struct platform_device *pdev)
        clock_rate = clk_get_rate(clk);
        clk_put(clk);
        clk_value = clock_rate / ADC_CLK;
-       if (clk_value < MAX_CLK_DIV) {
-               dev_err(&pdev->dev, "clock input less than min clock requirement\n");
-               err = -EINVAL;
-               goto err_disable_clk;
-       }
+
        /* TSCADC_CLKDIV needs to be configured to the value minus 1 */
        clk_value = clk_value - 1;
        tscadc_writel(tscadc, REG_CLKDIV, clk_value);
index 8d73fe29796a9bc1ce8687c9e18e6963cc278c62..71bb41c32a6434bb9e124b11d9e9b8463619c854 100644 (file)
 #define CNTRLREG_TSCENB                BIT(7)
 
 #define ADC_CLK                        3000000
-#define        MAX_CLK_DIV             7
 #define TOTAL_STEPS            16
 #define TOTAL_CHANNELS         8