Pull Samsung SoC clk drivers updates from Krzysztof Kozlowski:
- Exynos850: Add CMU_G3D clock controller for the Mali GPU. This
brings new PLLs and few cleanups/simplifications in core Exynos clock
controller code, so they can be easier re-used in Exynos850 clock
controller driver.
New CMU_G3D clock controller needs Devicetree bindings header changes
with clock indices which are pulled from Samsung SoC repository.
- Extract Exynos5433 (ARM64) clock controller power management code to
common driver parts, so later it can be re-used by other Exynos clock
controller drivers. This only prepares for such re-usage, which is
expected to come later for Exynos850.
- Exynos850: make PMU_ALIVE_PCLK clock critical, because it is needed
for core block - Power Management Unit.
- Cleanup: remove() callback returns void.
* tag 'samsung-clk-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
clk: samsung: exynos850: Make PMU_ALIVE_PCLK critical
clk: samsung: Convert to platform remove callback returning void
clk: samsung: exynos5433: Extract PM support to common ARM64 layer
clk: samsung: Extract parent clock enabling to common function
clk: samsung: Extract clocks registration to common function
clk: samsung: exynos850: Add AUD and HSI main gate clocks
clk: samsung: exynos850: Implement CMU_G3D domain
clk: samsung: clk-pll: Implement pll0818x PLL type
clk: samsung: Set dev in samsung_clk_init()
clk: samsung: Don't pass reg_base to samsung_clk_register_pll()
clk: samsung: Remove np argument from samsung_clk_init()
dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D