igb: support BCM54616 PHY
authorJohn W Linville <linville@tuxdriver.com>
Fri, 21 Jul 2017 18:12:24 +0000 (14:12 -0400)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 9 Aug 2017 01:09:12 +0000 (18:09 -0700)
The management port on an Edgecore AS7712-32 switch uses an igb MAC, but
it uses a BCM54616 PHY. Without a patch like this, loading the igb
module produces dmesg output like this:

[    3.439125] igb: Copyright (c) 2007-2014 Intel Corporation.
[    3.439866] igb: probe of 0000:00:14.0 failed with error -2

Signed-off-by: John W Linville <linville@tuxdriver.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/igb/e1000_82575.c
drivers/net/ethernet/intel/igb/e1000_defines.h
drivers/net/ethernet/intel/igb/e1000_hw.h

index 4a50870e0fa7031acd253b3d29d6d7dd03e56d3f..c37cc8bccf47760481481b09dcb61a48de1ed2fc 100644 (file)
@@ -340,6 +340,9 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
                phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
                phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
                break;
+       case BCM54616_E_PHY_ID:
+               phy->type = e1000_phy_bcm54616;
+               break;
        default:
                ret_val = -E1000_ERR_PHY;
                goto out;
@@ -1659,6 +1662,9 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
        case e1000_phy_82580:
                ret_val = igb_copper_link_setup_82580(hw);
                break;
+       case e1000_phy_bcm54616:
+               ret_val = 0;
+               break;
        default:
                ret_val = -E1000_ERR_PHY;
                break;
index d8517779439bc87da745aadb78283da1350b4397..1de82f2473129601542631f409b7942692d692b5 100644 (file)
 #define I210_I_PHY_ID        0x01410C00
 #define M88E1543_E_PHY_ID    0x01410EA0
 #define M88E1512_E_PHY_ID    0x01410DD0
+#define BCM54616_E_PHY_ID    0x03625D10
 
 /* M88E1000 Specific Registers */
 #define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */
index 6ea9f702ba0f317d5cb7214c461950742d9035b0..6c9485ab4b574a83ca067d3adef34b389794cb2b 100644 (file)
@@ -128,6 +128,7 @@ enum e1000_phy_type {
        e1000_phy_ife,
        e1000_phy_82580,
        e1000_phy_i210,
+       e1000_phy_bcm54616,
 };
 
 enum e1000_bus_type {