net: phy: icplus: use the BIT macro where possible

This makes the code consistent by using the BIT() macro instead of
manual bit-shifting for some of the fields. No functional changes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index 3d3e9134c762f6b767c7f85d5c7332ace75fc4ff..3ec470adde3dbba8a57695e3d29a937341c664a0 100644 (file)
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -36,11 +36,11 @@ MODULE_LICENSE("GPL");
 
 /* IP101A/G - IP1001 */
 #define IP10XX_SPEC_CTRL_STATUS                16      /* Spec. Control Register */
-#define IP1001_RXPHASE_SEL             (1<<0)  /* Add delay on RX_CLK */
-#define IP1001_TXPHASE_SEL             (1<<1)  /* Add delay on TX_CLK */
+#define IP1001_RXPHASE_SEL             BIT(0)  /* Add delay on RX_CLK */
+#define IP1001_TXPHASE_SEL             BIT(1)  /* Add delay on TX_CLK */
 #define IP1001_SPEC_CTRL_STATUS_2      20      /* IP1001 Spec. Control Reg 2 */
 #define IP1001_APS_ON                  11      /* IP1001 APS Mode  bit */
-#define IP101A_G_APS_ON                        2       /* IP101A/G APS Mode bit */
+#define IP101A_G_APS_ON                        BIT(1)  /* IP101A/G APS Mode bit */
 #define IP101A_G_IRQ_CONF_STATUS       0x11    /* Conf Info IRQ & Status Reg */
 #define        IP101A_G_IRQ_PIN_USED           BIT(15) /* INTR pin used */
 #define        IP101A_G_NO_IRQ                 BIT(11) /* IRQ's inactive */