drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn

Enable asic Verde, Tahiti and Pitcairn UVD block.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c
index 5bd0ebf5736c4b34f735a041663b833c29a6d81c..9b12285177e3073c6a31a076a31c40064200e42c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si.c
+++ b/drivers/gpu/drm/amd/amdgpu/si.c
@@ -2197,7 +2197,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
                        amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
                else
                        amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block);
-               /* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
+               amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
                /* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
                break;
        case CHIP_OLAND: