drm/amd: Restore cached power limit during resume

The power limit will be cached in smu->current_power_limit but
if the ASIC goes into S3 this value won't be restored.

Restore the value during SMU resume.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250725031222.3015095-2-superm1@kernel.org
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 26a609e053a6fc494403e95403bc6a2470383bec)
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 756afe78a6e5ace9913d2142a07c375c30e458a1..310f51ff05b9e7c8900bbca7325ad8b838b0203d 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -2226,6 +2226,12 @@ static int smu_resume(struct amdgpu_ip_block *ip_block)
 
        adev->pm.dpm_enabled = true;
 
+       if (smu->current_power_limit) {
+               ret = smu_set_power_limit(smu, smu->current_power_limit);
+               if (ret && ret != -EOPNOTSUPP)
+                       return ret;
+       }
+
        dev_info(adev->dev, "SMU is resumed successfully!\n");
 
        return 0;