drm/amd/display: Add new command to disable replay timing resync

[WHY & HOW]
Add new command to disable replay timing resync

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index aa6e6923afede2730406029d1c76be746b42988e..55573083bc31ce0a3a3ac038212aac04e8942637 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -2876,6 +2876,10 @@ enum dmub_cmd_replay_type {
         * Set power opt and coasting vtotal.
         */
        DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL      = 4,
+       /**
+        * Set disabled iiming sync.
+        */
+       DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED      = 5,
 };
 
 /**
@@ -3038,6 +3042,27 @@ struct dmub_cmd_replay_set_power_opt_data {
        uint32_t power_opt;
 };
 
+/**
+ * Data passed from driver to FW in a DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED command.
+ */
+struct dmub_cmd_replay_set_timing_sync_data {
+       /**
+        * Panel Instance.
+        * Panel isntance to identify which replay_state to use
+        * Currently the support is only for 0 or 1
+        */
+       uint8_t panel_inst;
+
+       /**
+        * Explicit padding to 4 byte boundary.
+        */
+       uint8_t pad[3];
+       /**
+        * REPLAY set_timing_sync
+        */
+       bool timing_sync_supported;
+};
+
 /**
  * Definition of a DMUB_CMD__SET_REPLAY_POWER_OPT command.
  */
@@ -3104,6 +3129,20 @@ struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal {
        struct dmub_cmd_replay_set_coasting_vtotal_data replay_set_coasting_vtotal_data;
 };
 
+/**
+ * Definition of a DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED command.
+ */
+struct dmub_rb_cmd_replay_set_timing_sync {
+       /**
+        * Command header.
+        */
+       struct dmub_cmd_header header;
+       /**
+        * Definition of DMUB_CMD__REPLAY_SET_TIMING_SYNC_SUPPORTED command.
+        */
+       struct dmub_cmd_replay_set_timing_sync_data replay_set_timing_sync_data;
+};
+
 /**
  * Set of HW components that can be locked.
  *
@@ -4237,6 +4276,8 @@ union dmub_rb_cmd {
         * Definition of a DMUB_CMD__REPLAY_SET_POWER_OPT_AND_COASTING_VTOTAL command.
         */
        struct dmub_rb_cmd_replay_set_power_opt_and_coasting_vtotal replay_set_power_opt_and_coasting_vtotal;
+
+       struct dmub_rb_cmd_replay_set_timing_sync replay_set_timing_sync;
 };
 
 /**