drm/amdgpu: remove gtt_base_align handling
authorChristian König <christian.koenig@amd.com>
Thu, 6 Jul 2017 20:26:05 +0000 (22:26 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 14 Jul 2017 15:06:29 +0000 (11:06 -0400)
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 9c114622842103c7d7d4091f895dc9fece9784a8..590798f0c24542333c9fb6d231518f90aeb4f3b7 100644 (file)
@@ -564,7 +564,6 @@ struct amdgpu_mc {
        unsigned                vram_width;
        u64                     real_vram_size;
        int                     vram_mtrr;
-       u64                     gtt_base_align;
        u64                     mc_mask;
        const struct firmware   *fw;    /* MC firmware */
        uint32_t                fw_version;
index d92ac5c1af543d2348c2d5d5974ea432047f7fc1..c635abdac96f3f72eddd2a38c4d469ce120d7c29 100644 (file)
@@ -696,8 +696,8 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
 {
        u64 size_af, size_bf;
 
-       size_af = ((adev->mc.mc_mask - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align;
-       size_bf = mc->vram_start & ~mc->gtt_base_align;
+       size_af = adev->mc.mc_mask - mc->vram_end;
+       size_bf = mc->vram_start;
        if (size_bf > size_af) {
                if (mc->gtt_size > size_bf) {
                        dev_warn(adev->dev, "limiting GTT\n");
@@ -709,7 +709,7 @@ void amdgpu_gtt_location(struct amdgpu_device *adev, struct amdgpu_mc *mc)
                        dev_warn(adev->dev, "limiting GTT\n");
                        mc->gtt_size = size_af;
                }
-               mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;
+               mc->gtt_start = mc->vram_end + 1;
        }
        mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;
        dev_info(adev->dev, "GTT: %lluM 0x%016llX - 0x%016llX\n",
index 5f7750c6497e1401e61ca4b5f50e08538bd6513c..810d5734ce1eed5a25ad8a3201f005c1a5e20a89 100644 (file)
@@ -228,7 +228,6 @@ static void gmc_v6_0_vram_gtt_location(struct amdgpu_device *adev,
                mc->mc_vram_size = 0xFFC0000000ULL;
        }
        amdgpu_vram_location(adev, &adev->mc, base);
-       adev->mc.gtt_base_align = 0;
        amdgpu_gtt_location(adev, mc);
 }
 
index 388b52febc8b676d964b6e99e2ddbe648a6cce1b..066f00ad415291c2057177296ea67fe18e1d134b 100644 (file)
@@ -244,7 +244,6 @@ static void gmc_v7_0_vram_gtt_location(struct amdgpu_device *adev,
                mc->mc_vram_size = 0xFFC0000000ULL;
        }
        amdgpu_vram_location(adev, &adev->mc, base);
-       adev->mc.gtt_base_align = 0;
        amdgpu_gtt_location(adev, mc);
 }
 
index d148d1c585b3b7c0c32a4fb24d32d8fcd335ce01..f30c39c72bcac435f25f9cbb6f37d49ff0d0fbd0 100644 (file)
@@ -406,7 +406,6 @@ static void gmc_v8_0_vram_gtt_location(struct amdgpu_device *adev,
                mc->mc_vram_size = 0xFFC0000000ULL;
        }
        amdgpu_vram_location(adev, &adev->mc, base);
-       adev->mc.gtt_base_align = 0;
        amdgpu_gtt_location(adev, mc);
 }
 
index 8ec148727149c191c5e159985e8086b83b574706..dd2756ec11b8028910e127113b764f982fff788b 100644 (file)
@@ -420,7 +420,6 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
        if (!amdgpu_sriov_vf(adev))
                base = mmhub_v1_0_get_fb_location(adev);
        amdgpu_vram_location(adev, &adev->mc, base);
-       adev->mc.gtt_base_align = 0;
        amdgpu_gtt_location(adev, mc);
        /* base offset of vram pages */
        if (adev->flags & AMD_IS_APU)