for (i = 0; i < ngpps; i++) {
gpps[i] = community->gpps[i];
- if (gpps[i].size > 32)
+ if (gpps[i].size > INTEL_PINCTRL_MAX_GPP_SIZE)
return -EINVAL;
/* Special treatment for GPIO base */
}
gpps[i].padown_num = padown_num;
- padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32);
+ padown_num += DIV_ROUND_UP(gpps[i].size * 4, INTEL_PINCTRL_MAX_GPP_SIZE);
}
community->gpps = gpps;
unsigned int padown_num = 0;
size_t i, ngpps = DIV_ROUND_UP(npins, community->gpp_size);
- if (community->gpp_size > 32)
+ if (community->gpp_size > INTEL_PINCTRL_MAX_GPP_SIZE)
return -EINVAL;
gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
size_t ngroups;
};
+#define INTEL_PINCTRL_MAX_GPP_SIZE 32
+
/**
* struct intel_padgroup - Hardware pad group information
* @reg_num: GPI_IS register number
* @base: Starting pin of this group
- * @size: Size of this group (maximum is 32).
+ * @size: Size of this group (maximum is %INTEL_PINCTRL_MAX_GPP_SIZE).
* @gpio_base: Starting GPIO base of this group
* @padown_num: PAD_OWN register number (assigned by the core driver)
*