#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
+#include <linux/interconnect.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/list.h>
#define SPI_DELAY_THRESHOLD 1
#define SPI_DELAY_RETRY 10
+#define SPI_BUS_WIDTH 8
+
struct spi_qup {
void __iomem *base;
struct device *dev;
struct clk *cclk; /* core clock */
struct clk *iclk; /* interface clock */
+ struct icc_path *icc_path; /* interconnect to RAM */
int irq;
spinlock_t lock;
int mode;
struct dma_slave_config rx_conf;
struct dma_slave_config tx_conf;
+
+ u32 bw_speed_hz;
};
static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer);
return opstate & QUP_STATE_VALID;
}
+static int spi_qup_vote_bw(struct spi_qup *controller, u32 speed_hz)
+{
+ u32 needed_peak_bw;
+ int ret;
+
+ if (controller->bw_speed_hz == speed_hz)
+ return 0;
+
+ needed_peak_bw = Bps_to_icc(speed_hz * SPI_BUS_WIDTH);
+ ret = icc_set_bw(controller->icc_path, 0, needed_peak_bw);
+ if (ret)
+ return ret;
+
+ controller->bw_speed_hz = speed_hz;
+ return 0;
+}
+
static int spi_qup_set_state(struct spi_qup *controller, u32 state)
{
unsigned long loop;
struct scatterlist *tx_sgl, *rx_sgl;
int ret;
+ ret = spi_qup_vote_bw(qup, xfer->speed_hz);
+ if (ret) {
+ dev_err(qup->dev, "fail to vote for ICC bandwidth: %d\n", ret);
+ return -EIO;
+ }
+
if (xfer->rx_buf)
rx_done = spi_qup_dma_done;
else if (xfer->tx_buf)
static int spi_qup_probe(struct platform_device *pdev)
{
struct spi_controller *host;
+ struct icc_path *icc_path;
struct clk *iclk, *cclk;
struct spi_qup *controller;
struct resource *res;
if (IS_ERR(iclk))
return PTR_ERR(iclk);
+ icc_path = devm_of_icc_get(dev, NULL);
+ if (IS_ERR(icc_path))
+ return dev_err_probe(dev, PTR_ERR(icc_path),
+ "failed to get interconnect path\n");
+
/* This is optional parameter */
if (of_property_read_u32(dev->of_node, "spi-max-frequency", &max_freq))
max_freq = SPI_MAX_RATE;
controller->base = base;
controller->iclk = iclk;
controller->cclk = cclk;
+ controller->icc_path = icc_path;
controller->irq = irq;
ret = spi_qup_init_dma(host, res->start);
writel_relaxed(config, controller->base + QUP_CONFIG);
clk_disable_unprepare(controller->cclk);
+ spi_qup_vote_bw(controller, 0);
clk_disable_unprepare(controller->iclk);
return 0;
return ret;
clk_disable_unprepare(controller->cclk);
+ spi_qup_vote_bw(controller, 0);
clk_disable_unprepare(controller->iclk);
return 0;
}