net/mlx5e: Use DIM constants for CQ period mode parameter

Use core DIM CQ period mode enum values for the CQ parameter for the period
mode. Translate the value to the specific mlx5 device constant for the
selected period mode when creating a CQ. Avoid needing to translate mlx5
device constants to DIM constants for core DIM functionality.

Co-developed-by: Nabil S. Alramli <dev@nalramli.com>
Signed-off-by: Nabil S. Alramli <dev@nalramli.com>
Co-developed-by: Joe Damato <jdamato@fastly.com>
Signed-off-by: Joe Damato <jdamato@fastly.com>
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://lore.kernel.org/r/20240419080445.417574-3-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/dim.h b/drivers/net/ethernet/mellanox/mlx5/core/en/dim.h
index cd2cf647c85a5a87fb8c6d7f02b361ea0a4b37ed..6411ae4c6b940bb0cd0dd26274e3808199587a16 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/dim.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/dim.h
@@ -4,11 +4,37 @@
 #ifndef __MLX5_EN_DIM_H__
 #define __MLX5_EN_DIM_H__
 
+#include <linux/dim.h>
 #include <linux/types.h>
+#include <linux/mlx5/mlx5_ifc.h>
 
 /* Forward declarations */
 struct work_struct;
 
+/* convert a boolean value for cqe mode to appropriate dim constant
+ * true  : DIM_CQ_PERIOD_MODE_START_FROM_CQE
+ * false : DIM_CQ_PERIOD_MODE_START_FROM_EQE
+ */
+static inline int mlx5e_dim_cq_period_mode(bool start_from_cqe)
+{
+       return start_from_cqe ? DIM_CQ_PERIOD_MODE_START_FROM_CQE :
+               DIM_CQ_PERIOD_MODE_START_FROM_EQE;
+}
+
+static inline enum mlx5_cq_period_mode
+mlx5e_cq_period_mode(enum dim_cq_period_mode cq_period_mode)
+{
+       switch (cq_period_mode) {
+       case DIM_CQ_PERIOD_MODE_START_FROM_EQE:
+               return MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
+       case DIM_CQ_PERIOD_MODE_START_FROM_CQE:
+               return MLX5_CQ_PERIOD_MODE_START_FROM_CQE;
+       default:
+               WARN_ON_ONCE(true);
+               return MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
+       }
+}
+
 void mlx5e_rx_dim_work(struct work_struct *work);
 void mlx5e_tx_dim_work(struct work_struct *work);
 

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
index a3f31d9d527ec81230294a5511fdc5392a7980f9..0424628405e01b818869da552260262324fa5bee 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/params.c
@@ -6,6 +6,7 @@
 #include "en/port.h"
 #include "en_accel/en_accel.h"
 #include "en_accel/ipsec.h"
+#include <linux/dim.h>
 #include <net/page_pool/types.h>
 #include <net/xdp_sock_drv.h>
 
@@ -520,7 +521,7 @@ static struct dim_cq_moder mlx5e_get_def_tx_moderation(u8 cq_period_mode)
        moder.cq_period_mode = cq_period_mode;
        moder.pkts = MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_PKTS;
        moder.usec = MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC;
-       if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE)
+       if (cq_period_mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE)
                moder.usec = MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC_FROM_CQE;
 
        return moder;
@@ -533,39 +534,26 @@ static struct dim_cq_moder mlx5e_get_def_rx_moderation(u8 cq_period_mode)
        moder.cq_period_mode = cq_period_mode;
        moder.pkts = MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_PKTS;
        moder.usec = MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC;
-       if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE)
+       if (cq_period_mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE)
                moder.usec = MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE;
 
        return moder;
 }
 
-static u8 mlx5_to_net_dim_cq_period_mode(u8 cq_period_mode)
-{
-       return cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE ?
-               DIM_CQ_PERIOD_MODE_START_FROM_CQE :
-               DIM_CQ_PERIOD_MODE_START_FROM_EQE;
-}
-
 void mlx5e_reset_tx_moderation(struct mlx5e_params *params, u8 cq_period_mode)
 {
-       if (params->tx_dim_enabled) {
-               u8 dim_period_mode = mlx5_to_net_dim_cq_period_mode(cq_period_mode);
-
-               params->tx_cq_moderation = net_dim_get_def_tx_moderation(dim_period_mode);
-       } else {
+       if (params->tx_dim_enabled)
+               params->tx_cq_moderation = net_dim_get_def_tx_moderation(cq_period_mode);
+       else
                params->tx_cq_moderation = mlx5e_get_def_tx_moderation(cq_period_mode);
-       }
 }
 
 void mlx5e_reset_rx_moderation(struct mlx5e_params *params, u8 cq_period_mode)
 {
-       if (params->rx_dim_enabled) {
-               u8 dim_period_mode = mlx5_to_net_dim_cq_period_mode(cq_period_mode);
-
-               params->rx_cq_moderation = net_dim_get_def_rx_moderation(dim_period_mode);
-       } else {
+       if (params->rx_dim_enabled)
+               params->rx_cq_moderation = net_dim_get_def_rx_moderation(cq_period_mode);
+       else
                params->rx_cq_moderation = mlx5e_get_def_rx_moderation(cq_period_mode);
-       }
 }
 
 void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)
@@ -573,7 +561,7 @@ void mlx5e_set_tx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)
        mlx5e_reset_tx_moderation(params, cq_period_mode);
        MLX5E_SET_PFLAG(params, MLX5E_PFLAG_TX_CQE_BASED_MODER,
                        params->tx_cq_moderation.cq_period_mode ==
-                               MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
+                               DIM_CQ_PERIOD_MODE_START_FROM_CQE);
 }
 
 void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)
@@ -581,7 +569,7 @@ void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)
        mlx5e_reset_rx_moderation(params, cq_period_mode);
        MLX5E_SET_PFLAG(params, MLX5E_PFLAG_RX_CQE_BASED_MODER,
                        params->rx_cq_moderation.cq_period_mode ==
-                               MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
+                               DIM_CQ_PERIOD_MODE_START_FROM_CQE);
 }
 
 bool slow_pci_heuristic(struct mlx5_core_dev *mdev)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
index 75bf7f3d9f25998858043f31a144af7da6b50092..c07785e675bc71db09e9b1821543026e1ff8d6fc 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
@@ -30,6 +30,7 @@
  * SOFTWARE.
  */
 
+#include <linux/dim.h>
 #include <linux/ethtool_netlink.h>
 
 #include "en.h"
@@ -627,15 +628,6 @@ mlx5e_set_priv_channels_rx_coalesce(struct mlx5e_priv *priv, struct ethtool_coal
        }
 }
 
-/* convert a boolean value of cq_mode to mlx5 period mode
- * true  : MLX5_CQ_PERIOD_MODE_START_FROM_CQE
- * false : MLX5_CQ_PERIOD_MODE_START_FROM_EQE
- */
-static int cqe_mode_to_period_mode(bool val)
-{
-       return val ? MLX5_CQ_PERIOD_MODE_START_FROM_CQE : MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
-}
-
 int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
                               struct ethtool_coalesce *coal,
                               struct kernel_ethtool_coalesce *kernel_coal,
@@ -688,13 +680,13 @@ int mlx5e_ethtool_set_coalesce(struct mlx5e_priv *priv,
        reset_rx = !!coal->use_adaptive_rx_coalesce != priv->channels.params.rx_dim_enabled;
        reset_tx = !!coal->use_adaptive_tx_coalesce != priv->channels.params.tx_dim_enabled;
 
-       cq_period_mode = cqe_mode_to_period_mode(kernel_coal->use_cqe_mode_rx);
+       cq_period_mode = mlx5e_dim_cq_period_mode(kernel_coal->use_cqe_mode_rx);
        if (cq_period_mode != rx_moder->cq_period_mode) {
                mlx5e_set_rx_cq_mode_params(&new_params, cq_period_mode);
                reset_rx = true;
        }
 
-       cq_period_mode = cqe_mode_to_period_mode(kernel_coal->use_cqe_mode_tx);
+       cq_period_mode = mlx5e_dim_cq_period_mode(kernel_coal->use_cqe_mode_tx);
        if (cq_period_mode != tx_moder->cq_period_mode) {
                mlx5e_set_tx_cq_mode_params(&new_params, cq_period_mode);
                reset_tx = true;
@@ -1915,7 +1907,7 @@ static int set_pflag_cqe_based_moder(struct net_device *netdev, bool enable,
        if (enable && !MLX5_CAP_GEN(priv->mdev, cq_period_start_from_cqe))
                return -EOPNOTSUPP;
 
-       cq_period_mode = cqe_mode_to_period_mode(enable);
+       cq_period_mode = mlx5e_dim_cq_period_mode(enable);
 
        current_cq_period_mode = is_rx_cq ?
                priv->channels.params.rx_cq_moderation.cq_period_mode :

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index cf529f07faf1ccdb06f47ef6749c22ebb64ff881..12d1f454834329cad18bbf7367bd22e591a781e5 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -30,6 +30,7 @@
  * SOFTWARE.
  */
 
+#include <linux/dim.h>
 #include <net/tc_act/tc_gact.h>
 #include <linux/mlx5/fs.h>
 #include <net/vxlan.h>
@@ -962,15 +963,7 @@ static int mlx5e_alloc_rq(struct mlx5e_params *params,
        }
 
        INIT_WORK(&rq->dim.work, mlx5e_rx_dim_work);
-
-       switch (params->rx_cq_moderation.cq_period_mode) {
-       case MLX5_CQ_PERIOD_MODE_START_FROM_CQE:
-               rq->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_CQE;
-               break;
-       case MLX5_CQ_PERIOD_MODE_START_FROM_EQE:
-       default:
-               rq->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
-       }
+       rq->dim.mode = params->rx_cq_moderation.cq_period_mode;
 
        return 0;
 
@@ -2090,7 +2083,7 @@ static int mlx5e_create_cq(struct mlx5e_cq *cq, struct mlx5e_cq_param *param)
        mlx5_fill_page_frag_array(&cq->wq_ctrl.buf,
                                  (__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas));
 
-       MLX5_SET(cqc,   cqc, cq_period_mode, param->cq_period_mode);
+       MLX5_SET(cqc,   cqc, cq_period_mode, mlx5e_cq_period_mode(param->cq_period_mode));
        MLX5_SET(cqc,   cqc, c_eqn_or_apu_element, eqn);
        MLX5_SET(cqc,   cqc, uar_page,      mdev->priv.uar->index);
        MLX5_SET(cqc,   cqc, log_page_size, cq->wq_ctrl.buf.page_shift -
@@ -5059,13 +5052,12 @@ void mlx5e_build_nic_params(struct mlx5e_priv *priv, struct mlx5e_xsk *xsk, u16
        params->packet_merge.timeout = mlx5e_choose_lro_timeout(mdev, MLX5E_DEFAULT_LRO_TIMEOUT);
 
        /* CQ moderation params */
-       rx_cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
-                       MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
-                       MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
+       rx_cq_period_mode =
+               mlx5e_dim_cq_period_mode(MLX5_CAP_GEN(mdev, cq_period_start_from_cqe));
        params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
        params->tx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
        mlx5e_set_rx_cq_mode_params(params, rx_cq_period_mode);
-       mlx5e_set_tx_cq_mode_params(params, MLX5_CQ_PERIOD_MODE_START_FROM_EQE);
+       mlx5e_set_tx_cq_mode_params(params, DIM_CQ_PERIOD_MODE_START_FROM_EQE);
 
        /* TX inline */
        mlx5_query_min_inline(mdev, &params->tx_min_inline_mode);

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
index 6acecf2e7cf6b33aabe911022d443c27bb8e6bcf..3097713005817f2eab0ffbbe7f358d2e973378b7 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rep.c
@@ -30,6 +30,7 @@
  * SOFTWARE.
  */
 
+#include <linux/dim.h>
 #include <linux/debugfs.h>
 #include <linux/mlx5/fs.h>
 #include <net/switchdev.h>
@@ -40,6 +41,7 @@
 
 #include "eswitch.h"
 #include "en.h"
+#include "en/dim.h"
 #include "en_rep.h"
 #include "en/params.h"
 #include "en/txrx.h"
@@ -836,9 +838,8 @@ static void mlx5e_build_rep_params(struct net_device *netdev)
        struct mlx5_core_dev *mdev = priv->mdev;
        struct mlx5e_params *params;
 
-       u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
-                                        MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
-                                        MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
+       u8 cq_period_mode =
+               mlx5e_dim_cq_period_mode(MLX5_CAP_GEN(mdev, cq_period_start_from_cqe));
 
        params = &priv->channels.params;
 

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 35ffc9b9f24191284049acf3da51a5331987eafc..8c7ddb22bf20eece038b70c4e4982d3fcf596151 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -4385,10 +4385,10 @@ enum {
        MLX5_CQC_ST_FIRED                                 = 0xa,
 };
 
-enum {
+enum mlx5_cq_period_mode {
        MLX5_CQ_PERIOD_MODE_START_FROM_EQE = 0x0,
        MLX5_CQ_PERIOD_MODE_START_FROM_CQE = 0x1,
-       MLX5_CQ_PERIOD_NUM_MODES
+       MLX5_CQ_PERIOD_NUM_MODES,
 };
 
 struct mlx5_ifc_cqc_bits {